CS8361
5.0 V Dual Micropower
Low Dropout Regulator
with ENABLE and RESET
The CS8361 is a precision Micropower dual voltage regulator with
ENABLE and RESET.
The 5.0 V standby output is accurate within
±2%
while supplying
loads of 100 mA and has a typical dropout voltage of 400 mV.
Quiescent current is low, typically 140
mA
with a 300
mA
load. The
active RESET output monitors the 5.0 V standby output and is low
during power−up and regulator dropout conditions. The RESET
circuit includes hysteresis and is guaranteed to operate correctly with
1.0 V on the standby output.
The second output tracks the 5.0 V standby output through an
external adjust lead, and can supply loads of 250 mA with a typical
dropout voltage of 400 mV. The logic level ENABLE lead is used to
control this tracking regulator output.
Both outputs are protected against overvoltage, short circuit, reverse
battery and overtemperature conditions. The robustness and low
quiescent current of the CS8361 makes it not only well suited for
automotive microprocessor applications, but for any battery powered
microprocessor applications.
Features
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SO−16L
DW SUFFIX
CASE 751G
D
2
PAK−7
DPS SUFFIX
CASE 936AB
1
PIN CONNECTIONS AND
MARKING DIAGRAM
V
IN
NC
V
TRK
GND
GND
Adj
NC
ENABLE
1
AWLYYWWG
16
V
STBY
NC
NC
GND
GND
NC
NC
RESET
CS8361
•
2 Regulated Outputs
−
Standby Output 5.0 V
±
2%; 100 mA
−
Tracking Output 5.0 V; 250 mA
•
Low Dropout Voltage (0.4 V at Rated Current)
•
RESET Option
•
ENABLE Option
•
Low Quiescent Current
•
Protection Features
−
Independent Thermal Shutdown
−
Short Circuit
−
60 V Load Dump
−
Reverse Battery
•
Internally Fused Leads in SO−16L Package
•
These are Pb−Free Devices
SO−16L
Pin 1. V
STBY
2. V
IN
3. V
TRK
4. GND
5. Adj
6. ENABLE
7. RESET
D
2
PAK−7
CS8361
A
WL
YY
WW
G
= Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
CS
8361
AWLYWWG
1
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2009
October, 2009
−
Rev. 17
1
Publication Order Number:
CS8361/D
CS8361
V
IN
Overvoltage
Shutdown
OVSD
Current
Limit
+
−
TSD OVSD
V
IN
Current
Limit
Thermal
Shutdown
TSD
−
+
ENABLE
−
+
BG
+
GND
RESET
−
RESET
V
STBY
TSD OVSD
Adj
V
TRK
250 mA
BG
Bandgap
RESET
BG
V
STBY
5.0 V, 100 mA, 2.0%
Figure 1. Block Diagram. Consult Your Local Sales Representative for Positive ENABLE Option
MAXIMUM RATINGS*
Rating
Supply Voltage, V
IN
Positive Transient Input Voltage, tr > 1.0 ms
Negative Transient Input Voltage, T < 100 ms, 1.0 % Duty Cycle
Input Voltage Range (ENABLE, RESET)
Tracking Regulator (V
TRK
, Adj)
Standby Regulator (V
STBY
)
Junction Temperature
Storage Temperature Range
ESD Susceptibility (Human Body Model)
Lead Temperature Soldering
Wave Solder (through hole styles only) Note 1
Reflow (SMD styles only) Note 2
Value
−16
to 26
60
−50
−0.3
to 10
20
10
−40
to +150
−55
to +150
2.0
260 peak
230 peak
Unit
V
V
V
V
V
V
°C
°C
kV
°C
°C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. 10 seconds max.
2. 60 seconds max above 183°C
*The maximum package power dissipation must be observed.
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2
CS8361
ELECTRICAL CHARACTERISTICS
(6.0 V
≤
V
IN
≤
26 V, I
OUT1
= I
OUT2
= 100
mA,
−40°C
≤
T
A
≤
+125°C,
−40°C
≤
T
J
≤
+150°C; unless otherwise stated.)
Characteristic
Tracking Output (V
TRK
)
V
TRK
Tracking Error (V
STBY
−
V
TRK)
Adjust Pin Current, I
Adj
Line Regulation
Load Regulation
Dropout Voltage (V
IN
−
V
TRK
)
Current Limit
Quiescent Current
Reverse Current
Ripple Rejection
Standby Output (V
STBY
)
Output Voltage, V
STBY
Line Regulation
Load Regulation
Dropout Voltage (V
IN
−
V
STBY
)
Current Limit
Short Circuit Current
Quiescent Current
Reverse Current
Ripple Rejection
RESET ENABLE Functions
ENABLE Input Threshold
ENABLE Input Bias Current
RESET Threshold High (V
RH
)
RESET Hysteresis
RESET Threshold Low (V
RL
)
RESET Leakage
Output Voltage, Low (V
RLO
)
Output Voltage, Low (V
RPEAK
)
Protection Circuitry (Both Outputs)
Independent Thermal Shutdown
Overvoltage Shutdown
V
STBY
V
TRK
−
150
150
30
180
165
34
−
−
38
°C
°C
V
V
STBY
Decreasing
−
1.0 V
≤
V
STBY
≤
V
RL
, R
RST
= 10 kW
V
STBY
, Power Up, Power Down
V
ENABLE
= 0 V to 10 V
V
STBY
Increasing
−
−
0.8
−10
4.59
60
4.53
−
−
−
1.2
0
4.87
120
4.75
−
0.1
0.6
2.0
10
V
STBY
−
0.02
180
V
STBY
−
0.08
25
0.4
1.0
V
mA
V
mV
V
mA
V
V
6.0 V
≤
V
IN
≤
26 V, 100
mA
≤
I
STBY
≤
100 mA.
6.0 V
≤
V
IN
≤
26 V.
100
mA
≤
I
STBY
≤
100 mA.
I
STBY
= 100
mA.
I
STBY
= 100 mA
V
IN
= 12 V, V
STBY
= 4.5 V
V
IN
= 12 V, V
STBY
= 0 V
V
IN
= 12 V, I
STBY
= 100 mA, I
TRK
= 0 mA
V
IN
= 12 V, I
STBY
= 300
mA,
I
TRK
= 0 mA
V
STBY
= 5.0 V, V
IN
= 0 V
f = 120 Hz, I
STBY
= 100 mA, 7.0 V
≤
V
IN
≤
17 V
4.9
−
−
−
−
125
10
−
−
−
60
5.0
5.0
5.0
100
400
200
100
10
140
100
70
5.1
50
50
150
600
−
−
20
200
200
−
V
mV
mV
mV
mV
mA
mA
mA
mA
mA
dB
6.0 V
≤
V
IN
≤
26 V, 100
mA
≤
I
TRK
≤
250 mA.
Note 3
Loop in Regulation
6.0 V
≤
V
IN
≤
26 V. Note 3
100
mA
≤
I
TRK
≤
250 mA. Note 3
I
TRK
= 100
mA.
I
TRK
= 250 mA
V
IN
= 12 V, V
TRK
= 4.5 V
V
IN
= 12 V, I
TRK
= 250 mA, No Load on V
STBY
V
TRK
= 5.0 V, V
IN
= 0 V
f = 120 Hz, I
TRK
= 250 mA, 7.0 V
≤
V
IN
≤
17 V
−25
−
−
−
−
−
275
−
−
60
−
1.5
5.0
5.0
100
400
500
25
200
70
+25
5.0
50
50
150
700
−
50
1500
−
mV
mA
mV
mV
mV
mV
mA
mA
mA
dB
Test Conditions
Min
Typ
Max
Unit
3. V
TRK
connected to Adj lead. V
TRK
can be set to higher values by using an external resistor divider.
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3
CS8361
PACKAGE PIN DESCRIPTION
PACKAGE PIN #
D
2
PAK, 7 Pin
1
2
3
4
5
6
7
SO−16L
16
1
3
4, 5, 12, 13
6
8
9
2, 7, 10, 11,
14, 15
PIN SYMBOL
V
STBY
V
IN
V
TRK
GND
Adj
ENABLE
RESET
NC
FUNCTION
Standby output voltage delivering 100 mA.
Input voltage.
Tracking output voltage controlled by ENABLE delivering 250 mA.
Reference ground connection.
Resistor divider from V
TRK
to Adj. Sets the output voltage on
V
TRK
. If tied to V
TRK
, V
TRK
will track V
STBY
.
Provides on/off control of the tracking output, active LOW.
CMOS compatible output lead that goes low whenever V
STBY
falls
out of regulation.
No connection.
CIRCUIT DESCRIPTION
ENABLE Function
The ENABLE function switches the output transistor for
V
TRK
on and off. When the ENABLE lead voltage exceeds
1.4 V (Typ), V
TRK
turns off. This input has several hundred
millivolts of hysteresis to prevent spurious output activity
during power−up or power−down.
RESET Function
The RESET is an open collector NPN transistor,
controlled by a low voltage detection circuit sensing the
V
STBY
(5.0 V) output voltage. This circuit guarantees the
RESET output stays below 1.0 V (0.1 V Typ) when V
STBY
is as low as 1.0 V to ensure reliable operation of
microprocessor− based systems.
B+
V
IN
CS8361
RESET
ENABLE
Adj
R1
GND
V
TRK
V
STBY
R3
This output uses the same type of output device as V
STBY
,
but is rated for 250 mA. The output is configured as a
tracking regulator of the standby output. By using the
standby output as a voltage reference, giving the user an
external programming lead (Adj lead), output voltages from
5.0 V to 20 V are easily realized. The programming is done
with a simple resistor divider (Figure 2), and following the
formula:
VTRK
+
VSTBY
(1
)
R1 R2)
)
IAdj
R1
V
TRK
Output Voltage
If another 5.0 V output is needed, simply connect the Adj
lead to the V
TRK
output lead.
5.0 V, 100 mA
C2**
10
mF
ESR < 8.0
W
C1*
0.1
mF
V
DD
MCU
RESET
I/O
R2
SW 8.0 V,
250 mA
C3**
10
mF
ESR < 8.0
W
GND
V
TRK
∼
V
STBY
(1 + R1/R2)
For V
TRK
∼
8.0 V, R1/R2
∼
0.6
*C1 is required if regulator is located far from power supply filter.
**C2 and C3 are required for stability.
Figure 2. Test and Application Circuit, 5.0 V, 8.0 V Regulator
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CS8361
B+
V
IN
CS8361
RESET
ENABLE
Adj
SW 5.0 V,
250 mA
V
STBY
R3
5.0 V, 100 mA
C2**
10
mF
ESR < 8.0
W
V
DD
MCU
RESET
I/O
C1*
0.1
mF
GND
V
TRK
C3**
10
mF
ESR < 8.0
W
GND
*C1 is required if regulator is located far from power supply filter.
**C2 and C3 are required for stability.
Figure 3. Test and Application Circuit, Dual 5.0 V Regulator
APPLICATION NOTES
External Capacitors
Output capacitors for the CS8361 are required for
stability. Without them, the regulator outputs will oscillate.
Actual size and type may vary depending upon the
application load and temperature range. Capacitor effective
series resistance (ESR) is also a factor in the IC stability.
Worst−case is determined at the minimum ambient
temperature and maximum load expected.
Output capacitors can be increased in size to any desired
value above the minimum. One possible purpose of this
would be to maintain the output voltages during brief
conditions of negative input transients that might be
characteristic of a particular system.
Capacitors must also be rated at all ambient temperatures
expected in the system. To maintain regulator stability down
to
−40°C,
capacitors rated at that temperature must be used.
More information on capacitor selection for SMART
REGULATOR®s is available in the SMART REGULATOR
application note, “Compensation for Linear Regulators,”
document number SR003AN/D, available through the
Literature Distribution Center or via our website at
http://www.onsemi.com.
Calculating Power Dissipation in a
Dual Output Linear Regulator
I
OUT1(max)
is the maximum output current, for the
application,
I
OUT2(max)
is the maximum output current, for the
application, and
I
Q
is the quiescent current the regulator consumes at both
I
OUT1(max)
and I
OUT2(max)
.
Once the value of P
D(max)
is known, the maximum
permissible value of R
qJA
can be calculated:
R
QJA
+
150° C
*
TA
PD
(2)
The value of R
qJA
can be compared with those in the
package section of the data sheet. Those packages with
R
qJA
’s less than the calculated value in equation 2 will keep
the die temperature below 150°C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
I
IN
I
OUT1
V
IN
SMART
REGULATOR
V
OUT1
The maximum power dissipation for a dual output
regulator (Figure 4) is
PD(max)
+
VIN(max)
*
VOUT1(min) IOUT1(max)
)
VIN(max)
*
VOUT2(min) IOUT2(max)
)
VIN(max)IQ
(1)
Control
Features
I
OUT2
V
OUT2
I
Q
where:
V
IN(max)
is the maximum input voltage,
V
OUT1(min)
is the minimum output voltage from V
OUT1
,
V
OUT2(min)
is the minimum output voltage from V
OUT2
,
Figure 4. Dual Output Regulator With Key
Performance Parameters Labeled.
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