LS7210 datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > The embedded processor and controller> Microcontrollers and processors> LS7210

LS7210: Descriptionprogrammable digital delay timer; CategoryThe embedded processor and controller Microcontrollers and processors; File Size48KB，4 Pages; ManufacturerLSI Computer Systems; Websitehttps://lsicsi.com

Download Datasheet Parametric View All

LS7210 Overview

programmable digital delay timer

LS7210 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	LSI Computer Systems
package instruction	,
Reach Compliance Code	compliant
JESD-609 code	e0
technology	CMOS
Terminal surface	Tin/Lead (Sn/Pb)

Preview

Download Datasheet

View All

LSI/CSI

LSI Computer Systems, Inc. 1235 Walt Whitman Road, Melville, NY 11747

TRIGGER

CLOCK SELECT

OSCILLATOR

EXTERNAL CLOCK

(-V)

LS7210

(631) 271-0400 FAX (631) 271-0405

February 1998

PIN ASSIGNMENT - TOP VIEW

A3800

PROGRAMMABLE DIGITAL DELAY TIMER

FEATURES:

•

Programmable Delay from 6 ms to "Infinity"

• Can be Cascaded for Sequential Events or Extended Delay

• +4.75V to +15V Operation (Vss -V

)

• On Chip Oscillator or External Clock time base

• High Noise Immunity

• LS7210 (DIP), LS7210-S (SOIC)-See Figure 1

DESCRIPTION:

The LS7210 is a monolithic MOS integrated circuit programmable

digital timer that can generate a delay in the range of 6ms to infinity.

The delay is programmed by 5 binary weighted input bits in combina-

tion with the time base provided. The chip can be operated in four

different modes: Delayed Operate, Delayed Release, Dual Delay

and One Shot. These modes are selected by the control inputs A

and B.

INPUT/OUTPUT DESCRIPTION:

OSCILLATOR Input

(Pin 5)

The frequency of the internal oscillator is set by an RC network con-

nected to the OSC input, as shown in Figure 2. The nominal os-

cillator frequency, f, at room temperature is given by f≈1/RC where R

values range from a minimum of 47KΩ to a maximum 3MΩ.

NOTE:

Oscillation accuracy from chip to chip for a fixed value of RC,

is + 10%. (Parts can supplied to tighter tolerances.)

(+V)

OUT

WB0

WB1

WB2

WB3

WB4

LSI

LS7210

FIGURE 1

TABLE 1. WEIGHTING BITS ASSIGNMENTS

INPUTS

WB0

WB1

WB2

WB3

WB4

VALUE

Example:

For a weighting factor of 25, inputs WB4, WB3, and

EXTERNAL CLOCK Input

(Pin 6)

WB0 should be programmed to logic 0.

If the internal oscillator is not used, the chip can be driven by an ex-

ternal clock applied to this input.

MODE SELECT Inputs A, B

(Pins 2, 1)

The chip can be programmed to operate in four different modes

CLOCK SELECT Input

(Pin 4)

by applying the logic levels to inputs A and B as indicated in

The internal oscillator or the external clock is selected by the proper Table 2. The mode select inputs are clocked into the input latch-

logic level applied to this input. A logic 1 selects the external clock es with the negative edge of the time base clock. These inputs

and logic 0 selects the internal oscillator. (See Note 1)

should not be changed while a delay timing is in progress. (See

Note 1)

TRIGGER Input

(Pin 3)

TABLE 2. MODE SELECTION

A positive or a negative transition at the trigger input initiates a delay

in turning on or off the output. A negative transition always turns on

CONTROL

MODE

the output with or without delay depending on the selected mode. A

positive transition at the trigger input always turns off the output (with

Dual Delay

the exception of one-shot mode) with or without delay depending on

Delayed Release

the selected mode. The delay is a function of the time base fre-

Delayed Operate

quency and the weighting factor programmed at the weighting bit in-

One Shot

puts. The trigger input is clocked into the input latch with the neg-

ative edge of the selected time base clock. All timings begin after the

OUT Output

(Pin 13)

latch has been set up. (See Note 1)

The output is an open drain FET. To obtain proper switching of

the output between Logic 0 and 1 levels, an external pull down re-

sistor to V

must be used. If the output is used only as a current

WEIGHTING FACTOR Inputs, WB0-WB4

(Pins 12-8)

source, no such pull down is needed. The output is logically in-

A delay from the trigger input to the output is programmed by ap- verted with respect to the trigger input.

plying 1's complement binary weighted numbers at these 5 inputs.

(See Note 1) The exact equation for the delay is:

, V

(Pins 14, 9)

Supply voltage positive, negative terminals.

(1 + 1, 023N)

= Oscillation Frequency

Delay

NOTE 1:

These inputs have internal pullup resistors.

= Weighting Factor

7210-041700-1

Recommended Resources

Broadband Difet Op Amp Circuit

LH-169A "Catch the Thief" Language Integrated Circuit

MAX663 series output voltage setting method circuit PMOS direct output circuit diagram

Circuit diagram of touch-type dimming desk lamp with vision care function

High-speed gain programmable amplifier circuit

Rotation monitor circuit

EEWORLD University Hall----Live Replay: Microchip implements MultiZone? security in RISC-V applications: Live Replay: Microchip implements MultiZone? security in RISC-V applications : https://training.eeworld.com.cn/course/5476...; hi5 Integrated technical exchanges

"Recommend Chinese chip" + Saiyuan MCU universal 92sc7321: When the company was making electronic switches, for reliability reasons, many components were from big brands, and the MCU was PIC. As a result, the product still had many problems. We went back to r...; neilperry Domestic Chip Exchange

How to get started with FPGA: FPGA (Field-Programmable Gate Array) is a field-programmable gate array, which is a further development of programmable devices such as PAL, GAL, CPLD, etc. It is a semi-custom circuit in the field of...; led2015 FPGA/CPLD

Porting git: Host platform: UBUNTU14.04Hardware platform: IMX6-EK200-6Q-1GKernel version: linux-4.1.15Cross-compilation chain: arm-linux-gnueabihf-gccFile system: L4115-fsl-image-qt5-myimx6a9.tar.bz2Download sourc...; 明远智睿Lan Industrial Control Electronics

Problems caused by stepping up the power supply and then stepping it down to connect it to the power supply: Due to product requirements, difficult problems have arisen in circuit design. For example: a 12v battery is connected to a DC-DC boost circuit, and the voltage rises to 18v. The output is then connec...; jyz520 Analog electronics

EEWORLD University ---- TI and WE's USB 3.1 Type-C solutions: TI and WE's USB 3.1 Type-C solution : https://training.eeworld.com.cn/course/4983...; wanglan123 Talking

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components