M
Section 23. 10-bit A/D Converter
HIGHLIGHTS
This section of the manual contains the following major topics:
23.1 Introduction ..................................................................................................................23-2
23.2 Control Register ...........................................................................................................23-3
23.3 Operation .....................................................................................................................23-5
23.4 A/D Acquisition Requirements .....................................................................................23-6
23.5 Selecting the A/D Conversion Clock ............................................................................23-8
23.6 Configuring Analog Port Pins.......................................................................................23-9
23.7 A/D Conversions ........................................................................................................23-10
23.8 Operation During Sleep .............................................................................................23-14
23.9 Effects of a Reset.......................................................................................................23-14
23.10 A/D Accuracy/Error ....................................................................................................23-15
23.11 Connection Considerations ........................................................................................23-16
23.12 Transfer Function .......................................................................................................23-16
23.13 Initialization ................................................................................................................23-17
23.14 Design Tips ................................................................................................................23-18
23.15 Related Application Notes..........................................................................................23-19
23.16 Revision History .........................................................................................................23-20
23
10-bit
A/D Converter
Note 1:
At present NO released mid-range MCU devices are available with this module.
Devices are planned, but there is no schedule for availability. Please refer to Micro-
chip’s Web site or BBS for release of Product Briefs which detail the features of
devices.
If your current design requires a 10-bit A/D, please look at the PIC17C756 which has
a 12-channel 10-bit A/D. This A/D has characteristics which are identical to this mod-
ule’s description.
©
1997 Microchip Technology Inc.
Preliminary
DS31023A page 23-1
PICmicro MID-RANGE MCU FAMILY
23.1
Introduction
The analog-to-digital (A/D) converter module can have up to eight analog inputs for a device.
The analog input charges a sample and hold capacitor. The output of the sample and hold capac-
itor is the input into the converter. The converter then generates a digital result of this analog level
via successive approximation. This A/D conversion, of the analog input signal, results in a corre-
sponding 10-bit digital number.
The analog reference voltages (positive and negative supply) are software selectable to either
the device’s supply voltages (AV
DD
, AVss) or the voltage level on the AN3/V
REF
+ and AN2/V
REF
-
pins.
The A/D converter has a unique feature of being able to operate while the device is in SLEEP
mode.
The A/D module has four registers. These registers are:
•
•
•
•
A/D Result High Register (ADRESH)
A/D Result Low Register (ADRESL)
A/D Control Register0 (ADCON0)
A/D Control Register1 (ADCON1)
The ADCON0 register, shown in
Figure 23-1,
controls the operation of the A/D module. The
ADCON1 register, shown in
Figure 23-2,
configures the functions of the port pins. The port pins
can be configured as analog inputs (AN3 and AN2 can also be the voltage references) or as dig-
ital I/O.
Figure 23-1:
10-bit A/D Block Diagram
CHS2:CHS0
111
AN7
110
AN6
101
AN5
100
V
AIN
(Input voltage)
011
010
10-bit
Converter
A/D
PCFG0
AV
DD
V
REF
+
Reference
voltage
V
REF
-
AN2
001
AN1
000
AN0
AN4
AN3
AV
SS
DS31023A-page 23-2
Preliminary
©
1997 Microchip Technology Inc.
Section 23. 10-bit A/D Converter
23.2
Control Register
Register 23-1: ADCON0 Register
R/W-0
ADCS1
bit 7
bit 7:6
R/W-0
ADCS0
R/W-0
CHS2
R/W-0
CHS1
R/W-0
CHS0
R/W-0
GO/DONE
U-0
—
R/W-0
ADON
bit 0
ADCS1:ADCS0:
A/D Conversion Clock Select bits
00
= F
OSC
/2
01
= F
OSC
/8
10
= F
OSC
/32
11
= F
RC
(clock derived from the internal A/D RC oscillator)
bit 5:3
CHS2:CHS0:
Analog Channel Select bits
000
= channel 0, (AN0)
001
= channel 1, (AN1)
010
= channel 2, (AN2)
011
= channel 3, (AN3)
100
= channel 4, (AN4)
101
= channel 5, (AN5)
110
= channel 6, (AN6)
111
= channel 7, (AN7)
Note:
For devices that do not implement the full 8 A/D channels, the unimplemented selec-
tions are reserved. Do not select any unimplemented channel.
23
10-bit
A/D Converter
bit 2
GO/DONE:
A/D Conversion Status bit
When ADON = 1
1 = A/D conversion in progress (setting this bit starts the A/D conversion which is
automatically cleared by hardware when the A/D conversion is complete)
0 = A/D conversion not in progress
bit 1
bit 0
Unimplemented:
Read as '0'
ADON:
A/D On bit
1 = A/D converter module is powered up
0 = A/D converter module is shut off and consumes no operating current
Legend
R = Readable bit
W = Writable bit
- n = Value at POR reset
U = Unimplemented bit, read as ‘0’
©
1997 Microchip Technology Inc.
Preliminary
DS31023A-page 23-3
PICmicro MID-RANGE MCU FAMILY
Register 23-2:
ADCON1 Register
U-0
—
bit 7
bit 7:6
bit 5
U-0
—
R/W-0
ADFM
U-0
—
R/W-0
PCFG3
R/W-0
PCFG2
R/W-0
PCFG1
R/W-0
PCFG0
bit 0
Unimplemented: Read as '0'
ADFM:
A/D Result format select (also see
Figure 23-6).
1 = Right justified. 6 Most Significant bits of ADRESH are read as ’0’.
0 = Left justified. 6 Least Significant bits of ADRESL are read as ’0’.
bit 4
bit 3:0
Unimplemented: Read as '0'
PCFG3:PCFG0:
A/D Port Configuration Control bits
PCFG AN7 AN6 AN5 AN4
0000
0001
0010
0011
0100
0101
011x
1000
1001
1010
1011
1100
1101
1110
1111
A
A
D
D
D
D
D
A
D
D
D
D
D
D
D
A
A
D
D
D
D
D
A
D
D
D
D
D
D
D
A
A
D
D
D
D
D
A
A
A
A
D
D
D
D
A
A
A
A
D
D
D
A
A
A
A
A
D
D
D
AN3
A
V
REF
+
A
V
REF
+
A
V
REF
+
D
V
REF
+
A
V
REF
+
V
REF
+
V
REF
+
V
REF
+
D
V
REF
+
AN2
A
A
A
A
D
D
D
V
REF
-
A
A
V
REF
-
V
REF
-
V
REF
-
D
V
REF
-
AN1 AN0 V
REF
+ V
REF
-
A
A
A
A
A
A
D
A
A
A
A
A
A
D
D
A
A
A
A
A
A
D
A
A
A
A
A
A
A
A
AV
DD
AN3
AV
DD
AN3
AV
DD
AN3
—
AN3
AV
DD
AN3
AN3
AN3
AN3
AV
DD
AN3
AV
SS
AV
SS
AV
SS
AV
SS
AV
SS
AV
SS
—
AN2
AV
SS
AV
SS
AN2
AN2
AN2
AV
SS
AN2
C/R
8/0
7/1
5/0
4/1
3/0
2/1
0/0
6/2
6/0
5/1
4/2
3/2
2/2
1/0
1/2
A = Analog input
D = Digital I/O
C/R = # of analog input channels / # of A/D voltage references
Legend
R = Readable bit
W = Writable bit
- n = Value at POR reset
U = Unimplemented bit, read as ‘0’
Note 1:
On any device reset, the port pins that are multiplexed with analog functions (ANx)
are forced to be an analog input.
DS31023A-page 23-4
Preliminary
©
1997 Microchip Technology Inc.
Section 23. 10-bit A/D Converter
23.3
Operation
The ADRESH:ADRESL registers contains the 10-bit result of the A/D conversion. When the A/D
conversion is complete, the result is loaded into this A/D result register pair, the GO/DONE bit
(ADCON0<2>) is cleared, and A/D interrupt flag bit, ADIF, is set. The block diagrams of the A/D
module are shown in
Figure 23-1.
After the A/D module has been configured as desired, the selected channel must be acquired
before the conversion is started. The analog input channels must have their corresponding TRIS
bits selected as inputs. To determine sample time, see Subsection
23.4 “A/D Acquisition
Requirements.”
After this acquisition time has elapsed the A/D conversion can be started. The
following steps should be followed for doing an A/D conversion:
1.
Configure the A/D module:
• Configure analog pins / voltage reference/ and digital I/O (ADCON1)
• Select A/D input channel (ADCON0)
• Select A/D conversion clock (ADCON0)
• Turn on A/D module (ADCON0)
Configure A/D interrupt (if desired):
• Clear the ADIF bit
• Set the ADIE bit
• Set the GIE bit
Wait the required acquisition time.
Start conversion:
• Set the GO/DONE bit (ADCON0)
Wait for A/D conversion to complete, by either:
• Polling for the GO/DONE bit to be cleared or ADIF bit to be set
OR
6.
7.
• Waiting for the A/D interrupt
Read A/D Result register pair (ADRESH:ADRESL), clear the ADIF bit, if required.
For next conversion, go to step 1 or step 2 as required.
2.
3.
4.
5.
23
10-bit
A/D Converter
Figure 23-2
shows the conversion sequence, and the terms that are used. Acquisition time is the
time that the A/D module’s holding capacitor is connected to the external voltage level. Then
there is the conversion time of 12 T
AD
, which is started when the GO bit is set. The sum of these
two times is the sampling time. There is a minimum acquisition time to ensure that the holding
capacitor is charged to a level that will give the desired accuracy for the A/D conversion.
Figure 23-2: A/D Conversion Sequence
A/D Sample Time
Acquisition Time
A/D Conversion Time
A/D conversion complete,
result is loaded in ADRES register.
Holding capacitor begins acquiring
voltage level on selected channel
ADIF bit is set
When A/D conversion is started (setting the GO bit)
When A/D holding capacitor starts to charge.
After A/D conversion, or when new A/D channel is selected
©
1997 Microchip Technology Inc.
Preliminary
DS31023A-page 23-5
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