IDT70V3569S4BF8 datasheet, PDF

Datasheet> All Categories > storage> storage> IDT70V3569S4BF8

IDT70V3569S4BF8: DescriptionDual-Port SRAM, 16KX36, 4.2ns, CMOS, PBGA208, FINE PITCH, BGA-208; Categorystorage storage; File Size172KB，17 Pages; ManufacturerIDT (Integrated Device Technology)

Download Datasheet Parametric Compare View All

IDT70V3569S4BF8 Overview

Dual-Port SRAM, 16KX36, 4.2ns, CMOS, PBGA208, FINE PITCH, BGA-208

IDT70V3569S4BF8 Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
Parts packaging code	BGA
package instruction	TFBGA, BGA208,17X17,32
Contacts	208
Reach Compliance Code	not_compliant
ECCN code	3A991.B.2.B
Maximum access time	4.2 ns
Other features	PIPELINED OUTPUT MODE, SELF TIMED WRITE CYCLE
Maximum clock frequency (fCLK)	133 MHz
I/O type	COMMON
JESD-30 code	S-PBGA-B208
JESD-609 code	e0
length	15 mm
memory density	589824 bit
Memory IC Type	DUAL-PORT SRAM
memory width	36
Humidity sensitivity level	3
Number of functions	1
Number of ports	2
Number of terminals	208
word count	16384 words
character code	16000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	16KX36
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	TFBGA
Encapsulate equivalent code	BGA208,17X17,32
Package shape	SQUARE
Package form	GRID ARRAY, THIN PROFILE, FINE PITCH
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	225
power supply	2.5/3.3,3.3 V
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum standby current	0.015 A
Minimum standby current	3.15 V
Maximum slew rate	0.46 mA
Maximum supply voltage (Vsup)	3.45 V
Minimum supply voltage (Vsup)	3.15 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn63Pb37)
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	20
width	15 mm
Base Number Matches	1

Preview

Download Datasheet

View All

HIGH-SPEED 3.3V 16K x 36

SYNCHRONOUS PIPELINED

DUAL-PORT STATIC RAM

WITH 3.3V OR 2.5V INTERFACE

Features:

◆

IDT70V3569S

◆

True Dual-Port memory cells which allow simultaneous

access of the same memory location

High-speed clock to data access

– Commercial: 4.2/5/6ns (max.)

– Industrial: 5ns (max)

Pipelined output mode

Counter enable and reset features

Dual chip enables allow for depth expansion without

additional logic

Full synchronous operation on both ports

– 7.5ns cycle time, 133MHz operation (9.6 Gbps bandwidth)

– Fast 4.2ns clock to data out

– 1.8ns setup to clock and 0.7ns hold on all control, data, and

address inputs @ 133MHz

◆

– Data input, address, byte enable and control registers

– Self-timed write allows fast cycle time

Separate byte controls for multiplexed bus and bus

matching compatibility

LVTTL- compatible, single 3.3V (±150mV) power supply for

core

LVTTL- compatible, selectable 3.3V (±150mV)/2.5V (±125mV)

power supply for I/Os and control signals on each port

Industrial temperature range (-40°C to +85°C) is

available for selected speeds

Available in a 208-pin Plastic Quad Flatpack (PQFP),

208-ball fine-pitch Ball Grid Array, and 256-pin Ball

Grid Array

Green parts availble, see ordering instructions

Functional Block Diagram

R/W

B B

3 3

L R

2 1

R/W

Dout0-8_L

Dout9-17_L

Dout18-26_L

Dout27-35_L

Dout0-8_R

Dout9-17_R

Dout18-26_R

Dout27-35_R

16K x 36

MEMORY

ARRAY

I/O

- I/O

35L

Din_L

Din_R

I/O

- I/O

35R

CLK

13L

CNTRST

ADS

CNTEN

CLK

Counter/

Address

Reg.

13R

ADDR_L

ADDR_R

Counter/

Address

Reg.

CNTRST

ADS

CNTEN

4831 tbl 01

OCTOBER 2008

DSC 4831/12

IDT70V3569S4BF8 Related Products

	IDT70V3569S4BF8	IDT70V3569S4BF	IDT70V3569S4BC8	IDT70V3569S4BFG8	IDT70V3569S6BF8	IDT70V3569S4BFG	IDT70V3569S4BC	IDT70V3569S6BF	IDT70V3569S6BFG	IDT70V3569S6DR
Description	Dual-Port SRAM, 16KX36, 4.2ns, CMOS, PBGA208, FINE PITCH, BGA-208	Dual-Port SRAM, 16KX36, 4.2ns, CMOS, PBGA208, FINE PITCH, BGA-208	Dual-Port SRAM, 16KX36, 4.2ns, CMOS, PBGA256, BGA-256	Dual-Port SRAM, 16KX36, 4.2ns, CMOS, PBGA208, FINE PITCH, BGA-208	Dual-Port SRAM, 16KX36, 6ns, CMOS, PBGA208, FINE PITCH, BGA-208	Dual-Port SRAM, 16KX36, 4.2ns, CMOS, CBGA208, 15 X 15 MM X 1.4 MM, 0.80 MM PITCH, GREEN, FPBGA-208	Dual-Port SRAM, 16KX36, 4.2ns, CMOS, PBGA256, BGA-256	Dual-Port SRAM, 16KX36, 6ns, CMOS, PBGA208, FINE PITCH, BGA-208	Dual-Port SRAM, 16KX36, 6ns, CMOS, CBGA208, 15 X 15 MM X 1.4 MM, 0.80 MM PITCH, GREEN, FPBGA-208	Dual-Port SRAM, 16KX36, 6ns, CMOS, PQFP208, PLASTIC, QFP-208
Is it lead-free?	Contains lead	Contains lead	Contains lead	Lead free	Contains lead	Lead free	Contains lead	Contains lead	Lead free	Contains lead
Is it Rohs certified?	incompatible	incompatible	incompatible	conform to	incompatible	conform to	incompatible	incompatible	conform to	incompatible
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
Parts packaging code	BGA	BGA	BGA	BGA	BGA	BGA	BGA	BGA	BGA	QFP
package instruction	TFBGA, BGA208,17X17,32	TFBGA, BGA208,17X17,32	LBGA, BGA256,16X16,40	TFBGA, BGA208,17X17,32	TFBGA, BGA208,17X17,32	LFBGA, BGA208,17X17,32	LBGA, BGA256,16X16,40	TFBGA, BGA208,17X17,32	LFBGA, BGA208,17X17,32	FQFP, QFP208,1.2SQ,20
Contacts	208	208	256	208	208	208	256	208	208	208
Reach Compliance Code	not_compliant	not_compliant	not_compliant	compliant	not_compliant	compliant	not_compliant	not_compliant	compliant	not_compliant
ECCN code	3A991.B.2.B	3A991.B.2.B	3A991.B.2.B	3A991.B.2.B	3A991.B.2.B	3A991.B.2.B	3A991.B.2.B	3A991.B.2.B	3A991.B.2.B	3A991.B.2.B
Maximum access time	4.2 ns	4.2 ns	4.2 ns	4.2 ns	6 ns	4.2 ns	4.2 ns	6 ns	6 ns	6 ns
Other features	PIPELINED OUTPUT MODE, SELF TIMED WRITE CYCLE	PIPELINED OUTPUT MODE, SELF TIMED WRITE CYCLE	PIPELINED OUTPUT MODE, SELF TIMED WRITE CYCLE	PIPELINED OUTPUT MODE, SELF TIMED WRITE CYCLE	PIPELINED OUTPUT MODE, SELF TIMED WRITE CYCLE	PIPELINED OUTPUT MODE, SELF TIMED WRITE CYCLE	PIPELINED OUTPUT MODE, SELF TIMED WRITE CYCLE	PIPELINED OUTPUT MODE, SELF TIMED WRITE CYCLE	PIPELINED OUTPUT MODE, SELF TIMED WRITE CYCLE	PIPELINED OUTPUT MODE, SELF TIMED WRITE CYCLE
Maximum clock frequency (fCLK)	133 MHz	133 MHz	133 MHz	133 MHz	83 MHz	133 MHz	133 MHz	83 MHz	83 MHz	83 MHz
I/O type	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON
JESD-30 code	S-PBGA-B208	S-PBGA-B208	S-PBGA-B256	S-PBGA-B208	S-PBGA-B208	S-CBGA-B208	S-PBGA-B256	S-PBGA-B208	S-CBGA-B208	S-PQFP-G208
JESD-609 code	e0	e0	e0	e1	e0	e1	e0	e0	e1	e0
length	15 mm	15 mm	17 mm	15 mm	15 mm	15 mm	17 mm	15 mm	15 mm	28 mm
memory density	589824 bit	589824 bit	589824 bit	589824 bit	589824 bit	589824 bit	589824 bit	589824 bit	589824 bit	589824 bit
Memory IC Type	DUAL-PORT SRAM	DUAL-PORT SRAM	DUAL-PORT SRAM	DUAL-PORT SRAM	DUAL-PORT SRAM	DUAL-PORT SRAM	DUAL-PORT SRAM	DUAL-PORT SRAM	DUAL-PORT SRAM	DUAL-PORT SRAM
memory width	36	36	36	36	36	36	36	36	36	36
Humidity sensitivity level	3	3	3	3	3	3	3	3	3	3
Number of functions	1	1	1	1	1	1	1	1	1	1
Number of ports	2	2	2	2	2	2	2	2	2	2
Number of terminals	208	208	256	208	208	208	256	208	208	208
word count	16384 words	16384 words	16384 words	16384 words	16384 words	16384 words	16384 words	16384 words	16384 words	16384 words
character code	16000	16000	16000	16000	16000	16000	16000	16000	16000	16000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C
organize	16KX36	16KX36	16KX36	16KX36	16KX36	16KX36	16KX36	16KX36	16KX36	16KX36
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	CERAMIC, METAL-SEALED COFIRED	PLASTIC/EPOXY	PLASTIC/EPOXY	CERAMIC, METAL-SEALED COFIRED	PLASTIC/EPOXY
encapsulated code	TFBGA	TFBGA	LBGA	TFBGA	TFBGA	LFBGA	LBGA	TFBGA	LFBGA	FQFP
Encapsulate equivalent code	BGA208,17X17,32	BGA208,17X17,32	BGA256,16X16,40	BGA208,17X17,32	BGA208,17X17,32	BGA208,17X17,32	BGA256,16X16,40	BGA208,17X17,32	BGA208,17X17,32	QFP208,1.2SQ,20
Package shape	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE
Package form	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, LOW PROFILE	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, LOW PROFILE, FINE PITCH	GRID ARRAY, LOW PROFILE	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, LOW PROFILE, FINE PITCH	FLATPACK, FINE PITCH
Parallel/Serial	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL
Peak Reflow Temperature (Celsius)	225	225	225	260	225	260	225	225	260	225
power supply	2.5/3.3,3.3 V	2.5/3.3,3.3 V	2.5/3.3,3.3 V	2.5/3.3,3.3 V	2.5/3.3,3.3 V	2.5/3.3,3.3 V	2.5/3.3,3.3 V	2.5/3.3,3.3 V	2.5/3.3,3.3 V	2.5/3.3,3.3 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.2 mm	1.2 mm	1.5 mm	1.2 mm	1.2 mm	1.7 mm	1.5 mm	1.2 mm	1.7 mm	4.1 mm
Maximum standby current	0.015 A	0.015 A	0.015 A	0.015 A	0.015 A	0.015 A	0.015 A	0.015 A	0.015 A	0.015 A
Minimum standby current	3.15 V	3.15 V	3.15 V	3.15 V	3.15 V	3.15 V	3.15 V	3.15 V	3.15 V	3.15 V
Maximum slew rate	0.46 mA	0.46 mA	0.46 mA	0.46 mA	0.31 mA	0.46 mA	0.46 mA	0.31 mA	0.31 mA	0.31 mA
Maximum supply voltage (Vsup)	3.45 V	3.45 V	3.45 V	3.45 V	3.45 V	3.45 V	3.45 V	3.45 V	3.45 V	3.45 V
Minimum supply voltage (Vsup)	3.15 V	3.15 V	3.15 V	3.15 V	3.15 V	3.15 V	3.15 V	3.15 V	3.15 V	3.15 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn63Pb37)	Tin/Lead (Sn63Pb37)	Tin/Lead (Sn63Pb37)	Tin/Silver/Copper (Sn/Ag/Cu)	Tin/Lead (Sn63Pb37)	Tin/Silver/Copper (Sn/Ag/Cu)	Tin/Lead (Sn63Pb37)	Tin/Lead (Sn63Pb37)	Tin/Silver/Copper (Sn/Ag/Cu)	Tin/Lead (Sn/Pb)
Terminal form	BALL	BALL	BALL	BALL	BALL	BALL	BALL	BALL	BALL	GULL WING
Terminal pitch	0.8 mm	0.8 mm	1 mm	0.8 mm	0.8 mm	0.8 mm	1 mm	0.8 mm	0.8 mm	0.5 mm
Terminal location	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	QUAD
Maximum time at peak reflow temperature	20	20	20	30	20	30	20	20	30	20
width	15 mm	15 mm	17 mm	15 mm	15 mm	15 mm	17 mm	15 mm	15 mm	28 mm
Base Number Matches	1	1	1	1	1	1	-	-	-	-

Recommended Resources

Integrated OTL power amplifier circuit composed of TDA2040

RSD6 soft starter controls motor forward running circuit

Cantonese YE-323HB electronic hot water bottle circuit diagram

Sensor voltage and current conversion circuit

Alarm circuit diagram

Remote control circuit composed of CSJ-T300B and CSJ-R02B

Digital frequency meter design: I want to design a frequency meter based on FPGA. There are programs for each module. They need to be created into a project file, which can be downloaded into fpga. If you can complete it, please pri...; 无名人 FPGA/CPLD

Audio Pre-Processing System Reference Design Using C5517: [i=s]This post was last edited by Jacktang on 2019-5-19 00:07[/i] [size=4]Audio Preprocessing System Reference Design Using C5517 Description This reference design uses multiple microphones, beamformi...; Jacktang DSP and ARM Processors

Complete breakdown, a conversation between a computer idiot and a hacker!: Hacker: I have controlled your computer. Xiaobai: How? Hacker: With a Trojan horse . Xiaobai: ... Where is it? I can't see it. Hacker: Open your task manager. Xiaobai: ... Where is the task manager? H...; soso Talking

EEWORLD University Hall ---- Image Processing and Analysis by Jia Yonghong, Wuhan University: Image Processing and Analysis, Yonghong Jia, Wuhan University : https://training.eeworld.com.cn/course/5404Image Processing and Analysis aims to enrich students' knowledge of image processing and anal...; 木犯001号 Integrated technical exchanges

What RF engineers must know: S parameters explained from the basics to the advanced (with examples): [i=s] This post was last edited by They Force Me to Be Undercover on 2018-10-23 11:23[/i] [size=3][color=rgb(50, 50, 50)][font=myFont, "]S parameter measurement is one of the basic means in the RF des...; 他们逼我做卧底 RF/Wirelessly

Weekly highlights: 2018.11.26-12.2: [size=4]Hi, everyone! Welcome to the post. It’s time to review the highlights of the week! Without further ado, come and read the post! [/size] [size=4] [/size] [size=4][b][color=#ff0000]Recommended e...; okhxyyo Talking

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components