MMT-135-02-LM-DH-A-004-TR datasheet, PDF

MMT-135-02-LM-DH-A-004-TR: DescriptionBoard Connector, 69 Contact(s), 2 Row(s), Male, Right Angle, Surface Mount Terminal,; CategoryThe connector The connector; File Size540KB，6 Pages; ManufacturerSAMTEC; Websitehttp://www.samtec.com/; Environmental Compliance

Download Datasheet Parametric View All

MMT-135-02-LM-DH-A-004-TR Overview

Board Connector, 69 Contact(s), 2 Row(s), Male, Right Angle, Surface Mount Terminal,

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Objectid	7132801865
Reach Compliance Code	compliant
ECCN code	EAR99
YTEOL	8.4
Other features	POLARIZED
Connector type	BOARD CONNECTOR
Contact to complete cooperation	GOLD (10)
Contact completed and terminated	Matte Tin (Sn)
Contact point gender	MALE
Contact material	PHOSPHOR BRONZE
DIN compliance	NO
Filter function	NO
IEC compliance	NO
JESD-609 code	e3
MIL compliance	NO
Mixed contacts	NO
Installation method	RIGHT ANGLE
Installation type	BOARD
Number of rows loaded	2
Options	GENERAL PURPOSE
Terminal pitch	2 mm
Termination type	SURFACE MOUNT
Total number of contacts	69
UL Flammability Code	94V-0

【Silicon Labs BG22-EK4108A Bluetooth Development Evaluation】+Connection Test Using Android APP: 1. After setting up the development correctly, you can test whether the code can run correctly. A more convenient way is to download the EFR Connect Android app. After startup, enter the demo page, wi...; 北方 Development Kits Review Area

How to encapsulate GPIO into nodes.: [color=#ff0000]A: How can I encapsulate a GPIO into a node of /sys/device/platform/rst. [/color] [color=#000000]B: Does it have to be in this directory /sys/device/platform/? Is there a way to only pu...; 明远智睿Lan Industrial Control Electronics

[RVB2601 Creative Application Development] Simulating UART 3 to implement FIFO reception: The hardware serial port has a FIFO function, so the received data will be put into the buffer. Since the GPIO simulation has no buffer, I "copied" a FIFO work myself. fifi.c /**************FIFO Begin...; lugl4313820 XuanTie RISC-V Activity Zone

Please God save the child: Please help me, big guys. I beg you. 1. Based on the principle of the narrow pulse frequency discrimination circuit, design a practical frequency discrimination circuit, in which the monostable trigge...; 无意lll Analog electronics

[AT-START-F403A Review] Part 2 F403 waveform output test and maximum frequency test: Clock waveform output test Like STM32 , the PA.8 pin of STM32 has the MCO function , which has a multiplexing function - clock output (MCO) , which can output the internal clock of STM32 through PA.8 ...; 常见泽1 Domestic Chip Exchange

EEWORLD University ---- Xilinx Zynq FPGA Video Tutorial: Xilinx Zynq FPGA video tutorial : https://training.eeworld.com.cn/course/4634This tutorial explains FPGA basics, SOC introduction, DMA and VDMA, Linux, HLS image and PCIESuitable for the following app...; 老白菜 FPGA/CPLD

Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

Popular Components