M5M4V4100L-7S datasheet, PDF - EEWORLD Datasheet

M5M4V4100L-7S: DescriptionFast Page DRAM, 4MX1, 70ns, CMOS, PZIP20; Categorystorage storage; File Size2MB，23 Pages; ManufacturerMitsubishi; Websitehttp://www.mitsubishielectric.com/semiconductors/

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M5M4V4100L-7S Overview

Fast Page DRAM, 4MX1, 70ns, CMOS, PZIP20

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Objectid	1164774084
package instruction	ZIP, ZIP20,.1
Reach Compliance Code	unknown
ECCN code	EAR99
Maximum access time	70 ns
I/O type	SEPARATE
JESD-30 code	R-PZIP-T20
JESD-609 code	e0
memory density	4194304 bit
Memory IC Type	FAST PAGE DRAM
memory width	1
Number of terminals	20
word count	4194304 words
character code	4000000
Maximum operating temperature	70 °C
Minimum operating temperature
organize	4MX1
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	ZIP
Encapsulate equivalent code	ZIP20,.1
Package shape	RECTANGULAR
Package form	IN-LINE
Certification status	Not Qualified
refresh cycle	1024
self refresh	YES
Maximum standby current	0.00005 A
Maximum slew rate	0.06 mA
Nominal supply voltage (Vsup)	3.3 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	1.27 mm
Terminal location	ZIG-ZAG

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