DN74LS109S datasheet, PDF - EEWORLD Datasheet

DN74LS109S: DescriptionJ-K Flip-Flop, 2-Func, Positive Edge Triggered, TTL, PDSO16; Categorylogic logic; File Size162KB，3 Pages; ManufacturerPanasonic; Websitehttp://www.panasonic.co.jp/semicon/e-index.html

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DN74LS109S Overview

J-K Flip-Flop, 2-Func, Positive Edge Triggered, TTL, PDSO16

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Objectid	100744989
package instruction	SOP, SOP16,.25
Reach Compliance Code	unknown
JESD-30 code	R-PDSO-G16
JESD-609 code	e0
Logic integrated circuit type	J-K FLIP-FLOP
Maximum Frequency@Nom-Sup	25000000 Hz
MaximumI(ol)	0.008 A
Number of functions	2
Number of terminals	16
Maximum operating temperature	70 °C
Minimum operating temperature	-20 °C
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Encapsulate equivalent code	SOP16,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
power supply	5 V
Maximum supply current (ICC)	8 mA
Certification status	Not Qualified
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	TTL
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Trigger type	POSITIVE EDGE

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