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STRUCTURE
TYPE
PRODUCT SERIES
FEATURES
Silicon Monolithic Integrated Circuit
Positive and Negative Variable Linear Regulator
ＢＤ３９１６ＦＶＭ
1. Built-in positive (REG1) and negative (REG2) Linear Regulator for CCDs/ Variable output/
Low dropout voltage type.
2. Built-in Discharge circuit. Negative output voltage (REG2) turns off immediately,
after STB turns off.
○ABSOLUTE MAXIMUM RATINGS (Ta=25℃)
Parameter
Positive Supply Voltage
Negative Supply Voltage
Power Dissipation
Operating Temperature Range
Storage Temperature Range
Maximum Junction Temperature
Symbol
VCC
VEE
Pd
Topr
Tstg
Tjmax
Limit
+18
-18
470
※1
※1
※2
Unit
V
V
mW
℃
℃
℃
-40½+85
-55½+125
125
※1 Not to exceed Pd.
※2 Reduced by 4.7mW/℃ over Ta=25℃ ,when mount on a glass epoxy board:70mm×70mm×1.6mm½
○OPERATING CONDITIONS
Parameter
Positive Supply Voltage
Negative Supply Voltage
REG1 Output Voltage
REG2 Output Voltage
Output Current 1
Output Current 2
Symbol
VCC
VEE
Vo1
Vo2
Io1
Io2
Min
+6.0
-14.0
Vctl1 *1
-8.5
－
－
Max
+18.0
-6.0
+16.0
Vctl2 *2
25
50
Unit
V
V
V
V
mA
mA
*1 REG1,CTL1 Short
*2 REG2,CTL2 Short
※ Vdropout(REG1) × Io(REG1) + Vdropout(REG2) × Io(REG2) not to exceed Pd=470mW.
NOTE)
The product described in this specification is a strategic product (and/or service) subject to COCOM regulations.
It should not be exported without authorization from the appropriate government.
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○ELECTRICAL CHARACTERISTICS(Unless otherwise specified, Ta=25℃, VCC=16.5V, VEE=-10V, Set REG1=15V, Set REG2=-7.5V)
Parameter
【Bias current】
Bias Current (VCC)
Bias Current (VEE)
【STB】
STB OFF Voltage
STB ON Voltage
STB OFF Bias Current (VEE)
STB ON Input Current
【Discharge block】
Discharge Current
【REG1】
CTL1 Voltage
Dropout Voltage 1
Peak Output Current 1
Load Regulation 1
Short –
Circuit Output Current 1
Ripple Rejection 1
Temperature Coefficient of Output Voltage 1
【REG2】
CTL2 Voltage
Dropout Voltage2
Peak Output Current2
Load Regulation2
Short –
Circuit Output Current 2
Ripple Rejection2
Temperature Coefficient of Output Voltage 2
Vctl1
ΔVd2
Io2
Vload2
Ishort2
R.R.2
Tcvo2
-1.269
－
50
－
－
－
－
-1.250
0.35
－
100
120
50
±0.02
-1.231
0.45
－
－
－
－
－
V
V
mA
mV
mA
dB
Io2=0½50mA
Vo2=0V
f=120Hz, ein=1Vrms, Io2=2mA
Io2=10mA
VEE=-7.1V, Io2=50mA
Vctl1
ΔVd1
Io1
Vload1
Ishort1
R.R.1
Tcvo1
1.379
－
25
－
－
－
－
1.400
0.25
－
100
50
50
±0.02
1.421
0.35
－
－
－
－
－
V
V
mA
mV
mA
dB
Io1=0½25mA
Vo1=0V
f=120Hz, ein=1Vrms, Io1=2mA
Io1=10mA
Vcc=14.2V, Io1=25mA
Idis
1.5
3.5
6.0
mA
STBOFF
STBON
IOFF
Iin
0
1.6
0.7
10
－
－
1.6
30
0.6
3.5
2.5
60
V
V
mA
μA
Io1,2=0mA
Io1,2=0mA
Io1,2=0mA
VSTB=2V, Io1,2=0mA
ICC
IEE
－
－
500
200
850
300
μA
μA
Io1=0mA
Io2=0mA
Symbol
Limits
MIN
Typ
MAX
Unit
Conditions
%/℃ Io1=1mA, Tj=0½125℃
%/℃ Io2=1mA, Tj=0½125℃
◎ Discharge time
t=(Reg2×Co)/Idis [s]
(VEE=-10V)
Co:Reg2 Output capacitor(μF)
This product is not designed for protection against radio active rays.
○PHYSICAL DIMENSIONS・MARKING
Part No.
D 3 9
1
6
Lot No.
MSOP-8 (UNIT：mm)
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○BLOCK DIAGRAM
○PIN No.・PIN NAME
Pin No.
VCC
VCC 2
BandGap
Pin Name
REG1
VCC
REG2
VEE
CTL2
STB
GND
CTL1
1
2
-
+
3
1 REG1
8 CTL1
4
5
6
TSD
OCP
7 GND
STB 6
Discharge
Block
5 CTL2
3 REG2
7
8
VEE 4
+
-
VEE
※Refer to the Technical Note about the details of the application.
○OPERATING NOTES
1) Absolute maximum ratings
Use of the IC in excess of absolute maximum ratings such as the applied voltage or operating temperature range may result
in IC damage. Assumptions should not be made regarding the state of the IC (short mode or open mode) when such damage
is suffered. A physical safety measure such as a fuse should be implemented when use of the IC in a special mode where
the absolute maximum ratings may be exceeded is anticipated.
2) VEE potential
Ensure a minimum VEE pin potential in all operating conditions.
3) Thermal design
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating
conditions.
4) Pin short and mistake mounting
Use caution when orienting and positioning the IC for mounting on printed circuit boards. Improper mounting may result
in damage to the IC. Shorts between output pins and the power supply and GND pins caused by the presence of a foreign
object may result in damage to the IC. Ensure a minimum GND pin potential in all operating conditions.
5) Actions in strong magnetic field
Keep in mind that the IC may malfunction in strong magnetic fields.
6) Testing on application boards
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress.
Always discharge capacitors after each process or step. Always turn the IC's power supply off before connecting it to
or removing it from a jig or fixture during the inspection process. Ground the IC during assembly steps as an antistatic
measure, and use similar caution when transporting or storing the IC.
7) This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.
P/N junctions are formed at the intersection of these P layers with the N layers of other elements to create a variety
of parasitic elements. For example, when the resistors and transistors are connected to the pins as shown in the following
figure,
The
P/N junction functions as a parasitic diode when VEE > Pin A for the resistor or VEE > Pin B for the transistor(NPN).
Similarly,
when VEE > Pin B for the transistor (NPN), the parasitic diode described above combines with the N layer
of other adjacent elements to operate as a parasitic NPN transistor.
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The formation of parasitic elements as a result of the relationships of the potentials of different pins is an inevitable
result of the IC's architecture. The operation of parasitic elements can cause interference with circuit operation as
well as IC malfunction and damage. For these reasons, it is necessary to use caution so that the IC is not used in a
way that will trigger the operation of parasitic elements, such as by the application of voltages lower than the VEE
(P substrate) voltage to input pins. Keep in mind that the IC may malfunction in strong magnetic fields.
Transistor (NPN)
Resistor
(Pin A)
(Pin B) C
B
E
(Pin B)
B
N
C
E
P
P+
N
P substrate
(Pin A)
VEE
Parasitic elements
or Transistors
VEE
Parasitic elements
N
VEE
Parasitic elements or
Transistors
P+
N
N
P
P
P+
N
N
P+
Parasitic elements
8) Ground patterns
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns, placing
a single ground point at the application's reference point so that the pattern wiring resistance and voltage variations
caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the GND
wiring pattern of any external parts, either.
9) Applications or inspection processes where the potentials of the VCC pin and other pins may be reversed from their normal
states may cause damage to the IC's internal circuitry or elements. Use an output pin capacitance of 1,000μF or lower
in case VCC is shorted with the GND pin while the external capacitor is charged. It is recommended to insert a diode
for preventing back current flow in series with VCC or bypass diodes between VCC and each pin.
Back current prevention diode
Bypass diode
VCC
Pin
10) Thermal shutdown circuit (TSD)
This IC incorporates a built-in TSD circuit for the protection from thermal destruction. The IC should be used within
the specified power dissipation range. However, in the event that the IC continues to be operated in excess of its power
dissipation limits, the attendant rise in the junction temperature (Tj) will trigger the TSD circuit to turn off all
output power elements.
The circuit automatically resets once the junction temperature (Tj) drops. Operation of the TSD circuit presumes that
the IC's absolute maximum ratings have been exceeded. Application designs should never make use of the TSD circuit.
11) Overcurrent protection circuit (OCP)
The IC incorporates a built-in overcurrent protection circuit that operates according to the output current capacity.
This circuit serves to protect the IC from damage when the load is shorted. The protection circuit is designed to limit
current flow by not latching in the event of a large and instantaneous current flow originating from a large capacitor
or other component. This protection circuits is effective in preventing damage due to sudden and unexpected accidents.
However, the IC should not be used in applications characterized by the continuous operation or transitioning of the
protection circuits. At the time of thermal designing, keep in mind that the current capacity has negative characteristics
to temperatures.
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Notice
Notes
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The content specified herein is for the purpose of introducing ROHM's products (hereinafter
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Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
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Great care was taken in ensuring the accuracy of the information specified in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
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The technical information specified herein is intended only to show the typical functions of and
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