C1825A822J1GAC7210 datasheet, PDF

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C1825A822J1GAC7210: DescriptionCeramic Capacitor, Multilayer, Ceramic, 100V, 5% +Tol, 5% -Tol, BP, -/+30ppm/Cel TC, 0.0082uF, 1825,; CategoryPassive components capacitor; File Size160KB，8 Pages; ManufacturerKEMET; Websitehttp://www.kemet.com; Environmental Compliance

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C1825A822J1GAC7210 Overview

Ceramic Capacitor, Multilayer, Ceramic, 100V, 5% +Tol, 5% -Tol, BP, -/+30ppm/Cel TC, 0.0082uF, 1825,

C1825A822J1GAC7210 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Objectid	926655748
package instruction	, 1825
Reach Compliance Code	compliant
ECCN code	EAR99
YTEOL	7.47
capacitance	0.0082 µF
Capacitor type	CERAMIC CAPACITOR
dielectric materials	CERAMIC
high	2.03 mm
JESD-609 code	e3
length	4.57 mm
multi-layer	Yes
negative tolerance	5%
Number of terminals	2
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package form	SMT
method of packing	TR, Plastic, 13 Inch
positive tolerance	5%
Rated (DC) voltage (URdc)	100 V
series	C1825(BP,100V)
size code	1825
Temperature characteristic code	BP
Temperature Coefficient	30ppm/Cel ppm/°C
Terminal surface	Matte Tin (Sn) - with Nickel (Ni) barrier
width	6.35 mm

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CERAMIC HIGH RELIABILITY

GENERAL INFORMATION GR900 SERIES

HIGH RELIABILITY — GR900

GR900 capacitors are intended for use in any application where

the chance of failure must be reduced to the lowest possible

level. While any well-made multilayer ceramic capacitor is an

inherently reliable device, GR900 capacitors receive special

attention in all phases of manufacture including:

— Raw Materials Selection

— Special Designs

— Clean Room Production

— Individual Batch Testing

— C-SAM (when applicable)

— Singular Batch Identity is Maintained

— Destructive Physical Analysis

These parts are well worth the added investment in comparison

to the cost of a device or system failure.

Typical applications include:

Medical, Aerospace, Communication Satellites, Radar, Guidance

Systems.

SCREENING AND SAMPLE TESTS

Each batch receives the following testing/inspections:

Preliminary:

1. Destructive Physical Analysis: (DPA) - A sample is pulled from

each lot and examined per EIA-469 and KEMET’s strict internal

void and delamination criteria. Sampling plan is per MIL-PRF-123.

2. C-SAM - May be performed on batches failing to meet the

DPA criteria for removal of marginal product. Not required on

each lot.

Group A

1. Thermal Shock

— Materials used in the construction of mul-

tilayer ceramic capacitors possess various thermal coefficients of

expansion. To assure maximum uniformity, each part is temper-

ature cycled in accordance to MIL-STD-202, Method 107,

Condition A with Step 3 being 125°C. Number of cycles shall be

20 (100% of lot).

2. Voltage Conditioning

— One of the most strenuous environ-

ments for any capacitor is the high temperature/high voltage test.

All units are subject to twice-rated voltage to the units at the max-

imum rated temperature of 125°C for a minimum of 168 hours

and a maximum of 264 hours. The voltage conditioning may be

terminated at any time during 168 hours to 264 hours time inter-

val that confirmed failures meet the requirements of the PDA dur-

ing the last 48 hours of 1 unit or .4% (100% of lot).

Optional Voltage Conditioning (Accelerated Voltage

Conditioning)

— All conditions of the standard voltage condi-

tioning apply with the exception of increased voltage and

decreased test time. Refer to MIL-PRF-123 for the proper formula.

*Step 5 is performed on chips at this point (100% of lot).

3. Dielectric Withstanding Voltage

— 250% of the dc rated volt-

age at 25°C (100% of lot).

4. Insulation Resistance

— The 25°C measurement with rated

voltage applied shall be the lesser of 100 GΩ or 1000 megohm-

microfarads (100% of lot).

*5. Insulation Resistance

— The 125°C measurement with

rated voltage applied shall be the lesser of 10 GΩ or 100

megohm-microfarads (100% of lot). For chips, 125°C IR is per-

formed prior to Step 3 above.

6. Storage

at 150°C for 2 hours minimum without voltage applied

followed by a 12-hour minimum stabilization period (temperature

characteristic BX only).

7. Capacitance

— Shall be within specified tolerance at 25°C

(100% of lot). (Aging phenomenon is taken into account for BX

dielectric to obtain capacitance.)

8. Dissipation Factor

— Shall not exceed 2.5% for X7R (BX)

dielectric, 0.15% for C0G (BP) dielectric at 25°C. (100% of lot.)

9. Percent Defective Allowable (PDA)

— The overall PDA is 8%

for parts outside the MIL-PRF-123 values. The PDA is per MIL-

PRF-123 for all parts that are valid MIL-PRF-123 values. The PD

includes steps 1 through 8 above with the following exceptions.

Capacitance exclusion - capacitance values no more than 5% or

.5pF, whichever is greater for BX characteristic or 1% or .3pF,

whichever is greater for BP characteristic beyond specified toler-

ance limit, shall be removed from the lot but shall not be consid-

ered defective for determination of the PD.

Insulation Resistance at 25°C — Product which is not acceptable

for twice the military limit but is acceptable per the military limit,

is removed from the lot but shall not be considered defective for

determination of the PD.

10. Visual and Mechanical Examination

— Performed per MIL-

PRF-123 criteria.

11. Radiographic Examination (Leaded Devices Only)

—

Radial devices receive a one-plane X-ray.

12. Destructive Physical Analysis (DPA)

— A sample is exam-

ined on each lot per EIA-469. Sampling Plan is per MIL-PRF-123.

STANDARD PACKAGING

All products are packaged in trays except C512 capacitors which

are packaged 1 piece per bag.

DATA PACKAGE

A data package is sent with each shipment which contains:

Final Destructive Physical Analysis (DPA) report.

Certificate of Compliance stating that the parts meet all applic-

able requirements of the appropriate military specification to the

best failure level to which KEMET is approved.

Summary of Group A Testing.

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