ABM2-8.000MHZ-20-B7W datasheet, PDF

ABM2-8.000MHZ-20-B7W: DescriptionParallel - Fundamental Quartz Crystal, 8MHz Nom, SMD, 2 PIN; CategoryPassive components Crystal/resonator; File Size940KB，4 Pages; ManufacturerAbracon; Websitehttp://www.abracon.com/index.htm

Download Datasheet Parametric View All

ABM2-8.000MHZ-20-B7W Overview

Parallel - Fundamental Quartz Crystal, 8MHz Nom, SMD, 2 PIN

Parameter Name	Attribute value
Objectid	7360224026
package instruction	SMD, 2 PIN
Reach Compliance Code	unknown
Country Of Origin	Mainland China
YTEOL	6.93
Other features	AT-CUT; TR, 7 INCH
Ageing	5 PPM/FIRST YEAR
Crystal/Resonator Type	PARALLEL - FUNDAMENTAL
Drive level	10 µW
frequency stability	0.0025%
frequency tolerance	15 ppm
load capacitance	20 pF
Installation features	SURFACE MOUNT
Nominal operating frequency	8 MHz
Maximum operating temperature	70 °C
Minimum operating temperature	-20 °C
physical size	L8.0XB4.5XH1.6 (mm)/L0.315XB0.177XH0.063 (inch)
Series resistance	100 Ω
surface mount	YES

EEWORLD University Hall----Unix Operating System: Unix operating system : https://training.eeworld.com.cn/course/5188I. Main Contents of the Course1. Introduce the characteristics and use of UNIX operating system;2. Master the basic structure and app...; 抛砖引玉 MCU

Let's publish an original hydrology article "L-band small PA": Share a small L- band PA I searched Baidu for information about L -band PA and found everything.First of all, how to define the origin of L bandLet's get into the topic Let's verify it from a theoreti...; btty038 RF/Wirelessly

Adafruit LIS2MDL Triple Axis Magnetometer Manual with Code: ...; littleshrimp MEMS sensors

Recruiting embedded software development engineers: Headhunting Position [Shenzhen] Job Responsibilities: 1. Responsible for the design of UAV flight control embedded system architecture, module function development and verification; 2. Responsible for...; ff318421749 Recruitment

TDC - Time to Digital Converter: When using the delay chain in FPGA to implement tdc, when latching the output data of the delay chain, the input data change near the clock edge violates the setup and hold time of the trigger, causin...; FPGA菜鸡 EE_FPGA Learning Park

Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

Popular Components