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V826616B24SCTL-D0

Description
Cache DRAM Module, 16MX64, 0.65ns, CMOS, PDMA200
Categorystorage    storage   
File Size195KB,14 Pages
ManufacturerProMOS Technologies Inc
Download Datasheet Parametric View All

V826616B24SCTL-D0 Overview

Cache DRAM Module, 16MX64, 0.65ns, CMOS, PDMA200

V826616B24SCTL-D0 Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
Objectid1126060255
package instructionDIMM, DIMM200,24
Reach Compliance Codecompliant
ECCN codeEAR99
Maximum access time0.65 ns
Maximum clock frequency (fCLK)200 MHz
I/O typeCOMMON
JESD-30 codeR-PDMA-N200
memory density1073741824 bit
Memory IC TypeCACHE DRAM MODULE
memory width64
Number of terminals200
word count16777216 words
character code16000000
Maximum operating temperature70 °C
Minimum operating temperature
organize16MX64
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeDIMM
Encapsulate equivalent codeDIMM200,24
Package shapeRECTANGULAR
Package formMICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply2.6 V
Certification statusNot Qualified
refresh cycle8192
Maximum slew rate1.6 mA
Nominal supply voltage (Vsup)2.6 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formNO LEAD
Terminal pitch0.6 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
V826616B24SC
128 MB 200-PIN DDR UNBUFFERED
SODIMM 16M x 64
Features
JEDEC 200 Pin DDR Unbuffered Small-Outline,
Dual In-Line memory module (SODIMM);
16,777,216 x 64 bit organization.
Utilizes High Performance 16M x 16 DDR
SDRAM in TSOPII-66 Packages
Single +2.5V (± 0.2V) Power Supply
Single +2.6V (± 0.1V) Power Supply for DDR400
Programmable CAS Latency, Burst Length, and
Wrap Sequence (Sequential & Interleave)
Auto Refresh (CBR) and Self Refresh
All Inputs, Outputs are SSTL-2 Compatible
8192 Refresh Cycles every 64 ms
Serial Presence Detect (SPD)
DDR SDRAM Performance
Component Used -6
-7
Module Speed
-75
-8
D0
Description
The V826616B24SC memory module is
organized 16,777,216 x 64 bits in a 200 pin memory
module. The 16M x 64 memory module uses 4
ProMOS 16M x 16 DDR SDRAM. The x64 modules
are ideal for use in high performance computer
systems where increased memory density and fast
access times are required.
t
CK
t
AC
Clock Frequency
166
143
133
125
(PC333) (PC266A) (PC266B) (PC200)
200
(max.)Clock Frequency (max.)
(PC400A)
D3
200
(PC400B)
C0
166
(PC333)
Units
MHz
ns
ns
ns
CLK
CLK
Clock Access Time
6
7
7.5
Clock Cycle
CAS Latency = 2.5Time CAS Latency = 2
Clock Cycle Time CAS Latency = 2.5
Clock Cycle Time CAS Latency = 3
8
7.5
5
5
3
3
7.5
6
5
3
3
7.5
6
-
3
3
t
CK
t
RCD
t
RP
tRCD parameter
tRP parameter
V826616B24SC Rev. 1.2 April 2006
1

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