MITSUBISHI <STD. LINEAR ICs>
M62332P/FP
M62337P/FP
8-BIT 2CH I
2
C BUS D-A CONVERTER WITH BUFFER AMPLIFIERS
DESCRIPTION
The M62332/M62337 is an integrated circuit
semiconductor of CMOS structure with 2 channels of built
in D-A converters with output buffer operational amplifiers.
The input is 2-wires serial method is used for the transfer
format of digital data to allow connection with a
microcomputer with minimum wiring.
The output buffer operational amplifier employs AB class
output circuit with sync and source drive capacity of 1.0mA
or more,and it operates in the whole voltage range from
Vcc to ground.
The M62332 and the M62337 differ only in their slave
address.
PIN CONFIGURATION(TOP VIEW)
Ao1 1
8 Vcc
M62332
M62337
Ao2 2
N.C. 3
N.C. 4
7 SCL
6 SDA
5 GND
Outline 8P4 (P)
8P2S-A (FP)
FEATURES
•
Digital data transfer format
I
2
C BUS serial data method
•
Output buffer operational amplifier
it operates in the whole voltage range from Vcc to
ground.
N.C.:NO CONNECTION
•
High output current drive capacity
±1.0mA over
APPLICATION
Conversion from digital data to analog control data for
home-use and industrial equipment.
Signal gain control or automatic adjustment of DISPLAY-
MONITOR or CTV.
BLOCK DIAGRAM
Vcc
8
SCL
7
SDA
6
GND
5
POWER ON
RESET
I
2
C BUS TRANSCEIVER
8
CHANNEL
DECODER
8bit Latch
8bit upper
segment R-2R
8bit Latch
8bit upper
segment R-2R
1
2
Ao1
Ao2
MITSUBISHI ELECTRIC
980714 rev.F ( 1 / 6 )
MITSUBISHI <STD. LINEAR ICs>
M62332P/FP
M62337P/FP
8-BIT 2CH I
2
C BUS D-A CONVERTER WITH BUFFER AMPLIFIERS
EXPLANATION OF TERMINALS
Pin No.
6
7
1
2
8
5
Symbol
Function
SDA
SCL
Ao1
Ao2
Vcc
GND
Serial data input terminal
Serial clock input terminal
8-bit resolution D-A converter output terminal
Power supply terminal
GND terminal
ABSOLUTE MAXIMUM RATING
Symbol
Vcc
Vin
Vo
Pd
Topr
Tstg
Parameter
Supply voltage
Input voltage
Output voltage
Power dissipation
Operating temperature
Storage temperature
Conditions
Ratings
–0.3 to 7.0
–0.3 to Vcc+0.3
–0.3 to Vcc+0.3
417 (DIP) / 272 (FP)
–20 to 85
–55 to 125
Unit
V
V
V
mW
°C
°C
ELECTRICAL CHARACTERISTICS
(V
cc
=+5V±10%,GND=0V,Ta=–20 to 85°C unless otherwise noted)
Symbol
V
cc
I
cc
I
ILK
V
IL
V
IH
V
AO
Parameter
Suplly voltage
Supply current
CLK=500kHz Operation, IAO=0
µ
A
Data : 6Ah (at maximum current )
SDA=SCL=GND,IAO=0
µ
A
Test conditions
MIN
2.7
0
0
–10
Ratings
TYP
5.0
0.6
0.4
MAX
5.5
2.5
1.6
10
0.2V
CC
Unit
V
mA
mA
µA
V
V
Input leak current
Input low voltage
Input high voltage
Buffer amplifier output
voltage range
Buffer amplifier output
drive range
Differential nonlinearity
Nonlinearity
V
IN
=0 to V
cc
0.8V
CC
I
AO
=±100µA
I
AO
=±500µA
Upper side saturation voltage=0.3V
Lower side saturation voltage=0.2V
0.1
0.2
–1.0
–1.0
–1.5
V
CC
-0.1
V
CC
-0.2
1.0
1.0
1.5
2.0
2.0
0.1
5.0
V
V
mA
LSB
LSB
LSB
LSB
µF
Ω
980714 rev.F ( 2 / 6 )
I
AO
S
DL
S
L
S
ZERO
Zero code error
S
FULL
Co
Ro
Full scale error
Output capacitative load
Buffer amplifier
output inpedance
V
CC
=5.12V(20mV/LSB)
without load (I
AO
=0)
–2.0
–2.0
MITSUBISHI ELECTRIC
MITSUBISHI <STD. LINEAR ICs>
M62332P/FP
M62337P/FP
8-BIT 2CH I
2
C BUS D-A CONVERTER WITH BUFFER AMPLIFIERS
I
2
C BUS LINE CHARACTERISTICS
Symbol
f
SCL
t
BUF
t
HD:STA
t
LOW
t
HIGH
t
SU:STA
t
HD:DAT
t
SU:DAT
t
R
t
F
t
SU:STO
Parameter
SCL clock frequency
Time the bus must be free before a new transmission can start
Hold time START Condition. After this period,the first clock pulse is generated.
LOW period of the clock
HIGh period of the clock
Set-up time for START condition (Only relevant for a repeated START
condition)
Hold time DATA
Set-up time DATA
Rise time of both SDA and SCL lines
Fall time of both SDA and SCL lines
Set-up time for STOP condition
Min.
0
4.7
4.0
4.7
4.0
4.7
0
250
-
-
4.0
Max.
100
-
-
-
-
-
-
-
1000
300
-
units
KHz
µs
µs
µs
µs
µs
µs
ns
ns
ns
µs
• Note that a transmitter must internally provide at least a hold time to bridge the undefined region
(max.300 ns) of the falling edge of SCL.
TIMING CHART
t
R,
t
F
t
BUF
V
IH
SDA
V
IL
t
HD:STA
V
IH
SCL
t
SU:DAT
t
HD:DAT
t
SU:STA
t
SU:STO
V
IL
t
LOW
START
t
HIGH
START
STOP
START
MITSUBISHI ELECTRIC
980714 rev.F ( 3 / 6 )
MITSUBISHI <STD. LINEAR ICs>
M62332P/FP
M62337P/FP
8-BIT 2CH I
2
C BUS D-A CONVERTER WITH BUFFER AMPLIFIERS
I
2
C BUS FORMAT
STA SLAVE ADDRESS W A
STA: start condition
W: write(SDA=Low)
SUB ADDRESS
A
DAC DATA
A STP
A: affirmation bit
STP: stop condition
• SLAVE ADDRESS
M62332
First
Last
M62337
First
Last
1
0
0
1
1
1
0
1
0
0
1
1
0
1
• SUB ADDRESSS
First
Last
CHANNEL SELECT DATA
X
X
X
X
Don't care
X
X
X
S0
CHANNEL
SELECT
DATA
S0
0
1
Channel selection
ch1 selection
ch2 selection
• DAC DATA
First
MSB
Last
LSB
D7
First
MSB
D6
D5
D4
D3
D2
D1
D0
Last
LSB
D7
0
0
0
0
:
1
1
D6
0
0
0
0
:
1
1
D5
0
0
0
0
:
1
1
D4
0
0
0
0
:
1
1
D3
0
0
0
0
:
1
1
D2
0
0
0
0
:
1
1
D1
0
0
1
1
:
1
1
D0
0
1
0
1
:
0
1
DAC output
Vcc/256 x 1
Vcc/256 x 2
Vcc/256 x 3
Vcc/256 x 4
:
Vcc/256 x 255
Vcc
MITSUBISHI ELECTRIC
980714 rev.F (4 / 6 )
MITSUBISHI <STD. LINEAR ICs>
M62332P/FP
M62337P/FP
8-BIT 2CH I
2
C BUS D-A CONVERTER WITH BUFFER AMPLIFIERS
TIMING CHART (MODEL)
•start condition to slave address bite
SDA
SCL
D/A
output
start condition
•sub address bite
1
2
3
4
5
6
7
W
A
SDA
SCL
D/A
output
1
2
3
4
5
6
7
8
A
•DAC data bite to stop condition
SDA
SCL
D/A
output
1
2
3
4
5
6
7
8
A
stop condition
•Start condition
•Stop condition
With SCL at HIGH,SDA line goes from HIGH to LOW
With SCL at HIGH,SDA line goes from LOW to HIGH
(Under normal circumstances,SDA is changed when SCL is LOW)
•Acknowledge bit
The receiving IC has to pull down SDA line whenever receive slave data.
(The transmitting IC releases the SDA line just then transmit 8bit data.)
Digital Data Formats
SLAVE ADDRESS
A
A
A
STA
W
SUB ADDRESS 1
DAC DATA 1
SUB ADDRESS 2 A DAC DATA 2
A
SUB ADDRESS n
A DAC DATA n
A
STP
MITSUBISHI ELECTRIC
980714 rev.F ( 5 / 6 )
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