2SJ528(L), 2SJ528(S)
Silicon P Channel MOS FET
REJ03G0878-0300
(Previous: ADE-208-641A)
Rev.3.00
Sep 07, 2005
Description
High speed power switching
Features
•
Low on-resistance
R
DS (on)
= 0.17
Ω
typ.
•
4 V gate drive devices
•
High speed switching
Outline
RENESAS Package code: PRSS0004ZD-B
(Package name: DPAK (L)-(2) )
4
RENESAS Package code: PRSS0004ZD-C
(Package name: DPAK (S) )
4
D
1
2
3
G
1. Gate
2. Drain
3. Source
4. Drain
1
2
3
S
Rev.3.00 Sep 07, 2005 page 1 of 8
2SJ528(L), 2SJ528(S)
Absolute Maximum Ratings
(Ta = 25°C)
Item
Drain to source voltage
Gate to source voltage
Drain current
Drain peak current
Body to drain diode reverse drain current
Avalanche current
Avalanche energy
Channel dissipation
Channel temperature
Storage temperature
Notes: 1. PW
≤
10
µs,
duty cycle
≤
1%
2. Value at Tc = 25°C
3. Value at Tch = 25°C, Rg
≥
50
Ω
Symbol
V
DSS
V
GSS
I
D
I
D (pulse)
I
DR
Note 1
Value
–60
±20
–7
–28
–7
–7
4.2
20
150
–55 to +150
Unit
V
V
A
A
A
A
mJ
W
°C
°C
I
AP
Note 3
E
AR
Pch
Tch
Note 2
Note 3
Tstg
Electrical Characteristics
(Ta = 25°C)
Item
Drain to source breakdown voltage
Gate to source breakdown voltage
Zero gate voltage drain current
Gate to source leak current
Gate to source cutoff voltage
Static drain to source on state resistance
Static drain to source on state resistance
Forward transfer admittance
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Body to drain diode forward voltage
Body to drain diode reverse recovery time
Note:
4. Pulse test
Symbol
V
(BR) DSS
V
(BR) GSS
I
DSS
I
GSS
V
GS (off)
R
DS (on)
R
DS (on)
|y
fs
|
Ciss
Coss
Crss
t
d (on)
t
r
t
d (off)
t
f
V
DF
t
rr
Min
–60
±20
—
—
–1.0
—
—
3.0
—
—
—
—
—
—
—
—
—
Typ
—
—
—
—
—
0.17
0.24
5.0
400
220
75
10
40
75
65
–1.1
65
Max
—
—
–10
±10
–2.0
0.22
0.37
—
—
—
—
—
—
—
—
—
—
Unit
V
V
µA
µA
V
Ω
Ω
S
pF
pF
pF
ns
ns
ns
ns
V
ns
Test Conditions
I
D
= –10 mA, V
GS
= 0
I
G
=
±100 µA,
V
DS
= 0
V
DS
= –60 V, V
GS
= 0
V
GS
=
±16
V, V
DS
= 0
I
D
= –1 mA, V
DS
= –10 V
Note 4
I
D
= –4 A, V
GS
= –10 V
I
D
= –4 A, V
GS
= –4 V
Note 4
I
D
= –4 A, V
DS
= –10 V
V
DS
= –10 V
V
GS
= 0
f = 1 MHz
V
GS
= –10 V
I
D
= –4 A
R
L
= 7.5
Ω
I
F
= –7 A, V
GS
= 0
I
F
= –7 A, V
GS
= 0
di
F
/dt = 50 A/µs
Note 4
Rev.3.00 Sep 07, 2005 page 2 of 8
2SJ528(L), 2SJ528(S)
Main Characteristics
Power vs. Temperature Derating
40
–100
–30
Maximum Safe Operation Area
10
µs
0
1 m
µ
s
=1
DC
0m
s
Op
s(
era
1s
tio
ho
n(
t)
Tc
=2
5°
C)
Pch (W)
I
D
(A)
30
–10
–3
–1
–0.3
–0.1
–0.03
PW
10
Channel Dissipation
20
Drain Current
10
Operation in
this area is
limited by R
DS (on)
0
0
50
100
150
200
Ta = 25°C
–0.01
–0.1 –0.3
–1
–3
–10
–30
–100
Case Temperature
Tc (°C)
Drain to Source Voltage
V
DS
(V)
Typical Output Characteristics
–10
–10 V
–4 V
–6 V
–5 V
–3.5 V
–10
Pulse Test
Typical Transfer Characteristics
V
DS
= –10 V
Pulse Test
I
D
(A)
–8
I
D
(A)
Drain Current
–8
–6
–6
–3 V
Drain Current
–4
–4
25°C
Tc = 75°C
–25°C
–2
V
GS
= –2.5 V
–2
0
0
–2
–4
–6
–8
–10
0
0
–1
–2
–3
–4
–5
Drain to Source Voltage
V
DS
(V)
Gate to Source Voltage
V
GS
(V)
Drain to Source Saturation Voltage V
DS (on)
(V)
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
–2.0
Pulse Test
–1.6
Static Drain to Source on State Resistance
vs. Drain Current
Static Drain to Source on State Resistance
R
DS (on)
(Ω)
1
0.5
V
GS
= –4 V
0.2
0.1
0.05
–10 V
–1.2
–0.8
I
D
= –5 A
–2 A
–1 A
–0.4
0.02
Pulse Test
0.01
–0.1 –0.3
–1
–3
–10
–30
–100
0
0
–4
–8
–12
–16
–20
Gate to Source Voltage
V
GS
(V)
Drain Current
I
D
(A)
Rev.3.00 Sep 07, 2005 page 3 of 8
2SJ528(L), 2SJ528(S)
Static Drain to Source on State Resistance
vs. Temperature
Forward Transfer Admittance |yfs| (S)
Static Drain to Source on State Resistance
R
DS (on)
(Ω)
0.5
Pulse Test
–2 A
0.4
I
D
= –5 A
V
GS
= –4 V
–1 A
100
30
10
3
25°C
1
0.3
0.1
–0.1
75°C
Tc = –25°C
Forward Transfer Admittance vs.
Drain Current
0.3
0.2
–10 V
–1 A, –2 A
–5 A
0.1
V
DS
= –10 V
Pulse Test
–0.3
–1
–3
–10
–30
–100
0
–40
0
40
80
120
160
Case Temperature
Tc (°C)
Drain Current I
D
(A)
Typical Capacitance vs.
Drain to Source Voltage
5000
Body-Drain Diode Reverse
Recovery Time
500
Reverse Recovery Time trr (ns)
Pulse Test
2000
Capacitance C (pF)
200
100
50
1000
500
200
100
50
Crss
20 V
GS
= 0
f = 1 MHz
10
0
–10
Ciss
Coss
20
10
5
–0.1 –0.2
di / dt = 50 A /
µs
V
GS
= 0, Ta = 25°C
–0.5 –1
–2
–5
–10 –20
–20
–30
–40
–50
Reverse Drain Current
I
DR
(A)
Drain to Source Voltage V
DS
(V)
Dynamic Input Characteristics
V
DS
(V)
V
DD
= –10 V
–25 V
–50 V
I
D
= –7 A
Switching Characteristics
V
GS
(V)
0
1000
300
100
tf
30
10
3
1
–0.1
tr
td(on)
td(off)
0
–20
–4
Drain to Source Voltage
–40
V
DS
–60
V
GS
–80
V
DD
= –10 V
–25 V
–50 V
–8
–12
–16
Gate to Source Voltage
Switching Time t (ns)
–100
0
8
16
24
32
–20
40
V
GS
= –10 V, V
DD
= –30 V
PW = 5
µs,
duty
≤
1 %
–0.3
–1
–3
–10 –20
Gate Charge
Qg (nc)
Drain Current
I
D
(A)
Rev.3.00 Sep 07, 2005 page 4 of 8
2SJ528(L), 2SJ528(S)
Reverse Drain Current vs.
Source to Drain Voltage
–10
Maximum Avalanche Energy vs.
Channel Temperature Derating
Repetitive Avalanche Energy E
AR
(mJ)
10
I
AP
= –7 A
V
DD
= –25 V
duty < 0.1 %
Rg
≥
50
Ω
Reverse Drain Current I
DR
(A)
–8
8
–6
–10 V
–5 V
V
GS
= 0, 5 V
6
–4
4
–2
Pulse Test
0
0
–0.4
–0.8
–1.2
–1.6
–2.0
2
0
25
50
75
100
125
150
Source to Drain Voltage
V
SD
(V)
Channel Temperature Tch (°C)
Normalized Transient Thermal Impedance vs. Pulse Width
Normalized Transient Thermal Impedance
γ
s (t)
3
Tc = 25°C
1
D=1
0.5
0.3
0.2
0.1
0.1
0.05
0.02
θch
– c (t) =
γ
s (t) •
θch
– c
θch
– c = 6.25°C/W, Tc = 25°C
P
DM
D=
PW
T
100
µ
1m
10 m
100 m
1
10
PW
T
0.03
0.0
1s
1
ho
u
tp
lse
0.01
10
µ
Pulse Width PW (S)
Avalanche Test Circuit
Avalanche Waveform
1
• L • I
AP2
•
2
V
DSS
V
DSS
– V
DD
V
(BR)DSS
I
AP
V
DD
I
D
V
DS
V
DS
Monitor
L
I
AP
Monitor
E
AR
=
Rg
D.U.T
Vin
–15 V
50
Ω
V
DD
0
Rev.3.00 Sep 07, 2005 page 5 of 8
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