TMS320C5000——Low Power and High Performance Introduction

Jacktang

TMS320C5000——Low Power and High Performance Introduction [Copy link]

This post was last edited by Jacktang on 2019-8-9 22:03

TMS320C5000——Low power consumption, high performance DSP, 16-bit fixed point, speed 40~200MIPS. Main applications are wired and wireless communications, IP, portable information systems, pagers, hearing aids, etc.

　　There are three new members in the 'C5000 series. One is the 'C5402, which is a low-cost DSP with a target price of $5 per chip (50K batches). The speed remains at 100MIPS, and the on-chip storage space is slightly smaller, with 16K RAM and 4K ROM. The main application objects are wireless modems, new generation PDAs, Internet phones and other telephone systems, as well as consumer electronic products.

　　The second is 'C5420, which has two DSP cores, a speed of 200MIPS, 200K on-chip RAM, and a power consumption of 0.32mA/MIPS. When working at full speed of 200MIPS, it does not exceed 120mW, making it the DSP with the lowest power consumption in the industry. 'C5420 is the most integrated fixed-point DSP today, suitable for multi-channel base stations, servers, modems, telephone systems and other occasions that require high performance, low power consumption and small size.

　　The third is 'C5416, which is the first of TI's 0.15μm devices, with a speed of 160MIPS, three multi-channel buffered serial ports (McBSPs), which can be directly connected to T1 or E1 lines without external logic circuits , and has 128K on-chip RAM. Application objects are VoIP, communication servers, PBX (private branch exchange) and computer telephone systems.

　　The same generation of chips in the TMS320 series have the same CPU structure, but according to different market needs, they form different combinations of new memories and peripherals, resulting in a variety of derivative devices.

　　TMS320C54x Key Features

　　Figure 2 is a functional structure diagram of C54x. Its main performance is as follows:

⒈ CPU

　　Central Processing Unit, or CPU, is the core component of a computer. It is only the size of a matchbox and the thickness of a few dozen sheets of paper, but it is the computing core and control core of a computer. The CPU is responsible for reading instructions, decoding instructions and executing instructions for all operations in the computer. The main operating principle of the CPU, regardless of its appearance, is to execute a series of instructions stored in a so-called program. The devices discussed here follow a common architectural design. The program is stored in the computer memory as a series of numbers. The operating principle of almost all CPUs can be divided into four stages: fetch, decode, execute and write back.

　　Advanced multi-bus structure: one set of program bus (PAB, PB), three sets of data bus (CAB, CB, DAB, DB, EAB, EB)

　　40-bit math logic unit (ALU): includes a 40-bit barrel shift register and two independent 40-bit accumulators

　　17 17-bit parallel multiplier and 40-bit dedicated adder, single-cycle multiplication/accumulation (MAC)

　　Compare, Select, Store Unit (CSSU) for Viterbi operations

　　Exponential encoder that calculates the exponent of the value in the (40-bit) accumulator in a single cycle

　　Two address generators, including eight auxiliary registers and two arithmetic units

　　2. Memory

　　Addressable storage space up to 192K words (64 64 bits each for program, data and I/O), C548 can also expand program memory (8 megawords)

　　Typical C5400 chip memory

　　⒊ On-chip internal and external devices

　　Software programmable wait state generator

　　Programmable block switching

　　On-chip phase-locked loop clock generator

　　Disable external bus control mechanism

　　4. Instruction Set

　　Repeating a single instruction and repeating a block of instructions

　　Memory block move instructions

　　32-bit arithmetic instructions

　　Instructions that can read 2 or 3 operands simultaneously

　　Arithmetic instructions with parallel save and parallel load

　　Conditional Save Instructions

　　5. Power consumption control

　　IDLE1, IDLE2 and IDLE3 instructions can control it to enter power reduction mode

　　Can control whether to output CLKOUT signal

　　⒍ IEEE standard 1149.1 boundary scan logic interface