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CAT24WC66J-TE13REVC

Description
EEPROM, 8KX8, Serial, CMOS, PDSO8, SOIC-8
Categorystorage    storage   
File Size238KB,10 Pages
ManufacturerCatalyst
Websitehttp://www.catalyst-semiconductor.com/
Download Datasheet Parametric View All

CAT24WC66J-TE13REVC Overview

EEPROM, 8KX8, Serial, CMOS, PDSO8, SOIC-8

CAT24WC66J-TE13REVC Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerCatalyst
Parts packaging codeSOIC
package instructionSOP,
Contacts8
Reach Compliance Codeunknown
ECCN codeEAR99
Maximum clock frequency (fCLK)0.4 MHz
JESD-30 codeR-PDSO-G8
JESD-609 codee0
length4.9 mm
memory density65536 bit
Memory IC TypeEEPROM
memory width8
Number of functions1
Number of terminals8
word count8192 words
character code8000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize8KX8
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialSERIAL
Peak Reflow Temperature (Celsius)240
Certification statusNot Qualified
Maximum seat height1.75 mm
Serial bus typeI2C
Maximum supply voltage (Vsup)6 V
Minimum supply voltage (Vsup)2.5 V
Nominal supply voltage (Vsup)3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTIN LEAD
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width3.9 mm
Maximum write cycle time (tWC)10 ms
Base Number Matches1
CAT24WC66
64K-Bit I
2
C Serial CMOS EEPROM
FEATURES
s
400 kHz I
2
C bus compatible*
s
1.8 to 6 volt read and write operation
s
Cascadable for up to eight devices
s
32-byte page write buffer
s
Self-timed write cycle with auto-clear
s
Schmitt trigger inputs for noise protection
H
GEN
FR
ALO
EE
LE
A
D
F
R
E
E
TM
s
Commercial, industrial and automotive
temperature ranges
s
Write protection
s
1,000,000 program/erase cycles
s
100 year data retention
–Top 1/4 array protected when WP at V
IH
s
8-pin DIP or 8-pin SOIC packages
DESCRIPTION
The CAT24WC66 is a 64K-bit Serial CMOS EEPROM
internally organized as 8192 words of 8 bits each.
Catalyst’s advanced CMOS technology substantially
reduces device power requirements. The
PIN CONFIGURATION
A0
A1
A2
VSS
1
2
3
4
8
7
6
5
DIP Package (P, L)
VCC
WP
SCL
SDA
SOIC Package (J, K, W, X)
PIN FUNCTIONS
Pin Name
A0, A1, A2
SDA
SCL
WP
V
CC
V
SS
i
D
A2
VSS
A0
A1
c
s
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
i
t
n
o
u
n
VCC
VSS
SDA
WP
CAT24WC66 features a 32-byte page write buffer. The
device operates via the I
2
C bus serial interface and is
available in 8-pin DIP or 8-pin SOIC packages.
BLOCK DIAGRAM
EXTERNAL LOAD
d
e
DOUT
ACK
START/STOP
LOGIC
CONTROL
LOGIC
a
P
t
r
SENSE AMPS
SHIFT REGISTERS
WORD ADDRESS
BUFFERS
COLUMN
DECODERS
256
XDEC
256
EEPROM
256 X 256
Function
DATA IN STORAGE
Device Address Inputs
Serial Data/Address
HIGH VOLTAGE/
TIMING CONTROL
SCL
A0
A1
A2
STATE COUNTERS
SLAVE
ADDRESS
COMPARATORS
Serial Clock
Write Protect
+1.8V to +6V Power Supply
Ground
* Catalyst Semiconductor is licensed by Philips Corporation to carry the I
2
C Bus Protocol.
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Doc. No. 1037, Rev. H
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