7MP2010S50Z datasheet, PDF - EEWORLD Datasheet

7MP2010S50Z: DescriptionFIFO, 16KX18, 50ns, Asynchronous, CMOS, PZIP52; Categorystorage storage; File Size352KB，8 Pages; ManufacturerIDT (Integrated Device Technology)

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7MP2010S50Z Overview

FIFO, 16KX18, 50ns, Asynchronous, CMOS, PZIP52

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Objectid	1164054678
package instruction	ZIP, ZIP52,.1,.1
Reach Compliance Code	not_compliant
ECCN code	EAR99
Maximum access time	50 ns
Maximum clock frequency (fCLK)	15.4 MHz
JESD-30 code	R-PZIP-T52
JESD-609 code	e0
memory density	294912 bit
Memory IC Type	OTHER FIFO
memory width	18
Number of terminals	52
word count	16384 words
character code	16000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	16KX18
Package body material	PLASTIC/EPOXY
encapsulated code	ZIP
Encapsulate equivalent code	ZIP52,.1,.1
Package shape	RECTANGULAR
Package form	IN-LINE
power supply	5 V
Certification status	Not Qualified
Maximum standby current	0.065 A
Maximum slew rate	1.28 mA
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	TIN LEAD
Terminal form	THROUGH-HOLE
Terminal pitch	1.27 mm
Terminal location	ZIG-ZAG

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