Maximum Junction Temperature (Plastic Packages). . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. The collector of each transistor of the CA3127 is isolated from the substrate by an integral diode. The substrate (Terminal 5) must be con-
nected to the most negative point in the external circuit to maintain isolation between transistors and to provide for normal transistor action.
2.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
PARAMETER
T
A
= 25
o
C
TEST CONDITIONS
MIN
TYP
MAX
UNITS
DC CHARACTERISTICS
(For Each Transistor)
Collector-to-Base Breakdown Voltage
Collector-to-Emitter Breakdown Voltage
Collector-to-Substrate Breakdown-Voltage
Emitter-to-Base Breakdown Voltage (Note 3)
Collector-Cutoff-Current
Collector-Cutoff-Current
DC Forward-Current Transfer Ratio
I
C
= 10µA, I
E
= 0
I
C
= 1mA, I
B
= 0
I
C1
= 10µA, I
B
= 0, I
E
= 0
I
E
= 10µA, I
C
= 0
V
CE
= 10V I
B
= 0
V
CB
= 10V, I
E
= 0
V
CE
= 6V
I
C
= 5mA
I
C
= 1mA
I
C
= 0.1mA
Base-to-Emitter Voltage
V
CE
= 6V
I
C
= 5mA
I
C
= 1mA
I
C
= 0.1mA
Collector-to-Emitter Saturation Voltage
Magnitude of Difference in V
BE
Magnitude of Difference in I
B
DYNAMIC CHARACTERISTICS
Noise Figure
Gain-Bandwidth Product
Collector-to-Base Capacitance
Collector-to-Substrate Capacitance
Emitter-to-Base Capacitance
Voltage Gain
Power Gain
Noise Figure
Input Resistance
Output Resistance
Input Capacitance
Output Capacitance
Magnitude of Forward Transadmittance
NOTE:
3. When used as a zener for reference voltage, the device must not be subjected to more than 0.1mJ of energy from any possible capacitance
or electrostatic discharge in order to prevent degradation of the junction. Maximum operating zener current should be less than 10mA.
f = 100kHz, R
S
= 500Ω, I
C
= 1mA
V
CE
= 6V, I
C
= 5mA
V
CB
= 6V, f = 1MHz
V
CI
= 6V, f = 1MHz
V
BE
= 4V, f = 1MHz
V
CE
= 6V, f = 10MHz, R
L
= 1kΩ, I
C
= 1mA
Cascode Configuration
f = 100MHz, V+ = 12V, I
C
= 1mA
Common-Emitter Configuration
V
CE
= 6V, I
C
= 1mA, f = 200 MHz
-
-
-
-
-
-
27
-
-
-
-
-
-
28
30
3.5
400
4.6
3.7
2
24
2.2
1.15
See
Fig. 5
-
-
-
-
-
-
-
-
-
-
-
-
-
dB
GHz
pF
pF
pF
dB
dB
dB
Ω
kΩ
pF
pF
mS
I
C
= 10mA, I
B
= 1mA
Q
1
and Q
2
Matched
V
CE
= 6V, I
C
= 1mA
20
15
20
4
-
-
35
40
35
0.71
0.66
0.60
-
-
-
32
24
60
5.7
-
-
88
90
85
0.81
0.76
0.70
0.26
0.5
0.2
-
-
-
-
0.5
40
-
-
-
0.91
0.86
0.80
0.50
5
3
V
V
V
V
mV
µA
V
V
V
V
µA
nA
5-2
CA3127
Test Circuits
V+
10kΩ
BIAS-CURRENT
ADJ
470
pF
R
L
0.01
µF
1µF
2
51Ω
6
0.01µF
8
1µF
0.01
µF
470pF
7
V
I
GEN
Q
3
470pF
3
4
Q
2
V
O
FIGURE 1. VOLTAGE-GAIN TEST CIRCUIT USING CURRENT-MIRROR BIASING FOR Q
2
1.5 - 8pF
V
O
12
SHIELD
Q
5
2
V
I
1000pF
0.3µH
4
1.8pF
C
1
(NOTE 5)
3
Q
2
560Ω
750Ω
1%
1000
pF
6
8
1000
pF
7
25kΩ
Q
3
5
+12V
13
620Ω
14
1000
pF
1000
pF
TEST
POINT
C
2
(NOTE 5)
8.2
kΩ
0.47µH
NOTES:
4. This circuit was chosen because it conveniently repre-
sents a close approximation in performance to a proper-
ly unilateralized single transistor of this type. The use of
Q
3
in a current-mirror configuration facilitates simplified
biasing. The use of the cascode circuit in no way implies
that the transistors cannot be used individually.
5. E.F. Johnson number 160-104-1 or equivalent.
OHMITE
Z144
FIGURE 2. 100MHz POWER-GAIN AND NOISE-FIGURE TEST CIRCUIT
GENERAL RADIO 1021-P1
100MHz GENERATOR
ATTN
100MHz
TEST SET
BOONTON 91C
RF VOLTMETER
12V
DC
POWER SUPPLY
FIGURE 3A. POWER GAIN SET-UP
VHF NOISE SOURCE
HEWLETT PACKARD HP343A
100MHz
TEST SET
100MHz
POST AMPLIFIER
NOISE FIGURE METER
HEWLETT PACKARD HP342A
12V
DC
POWER SUPPLY
15V
DC
POWER SUPPLY
FIGURE 3B. NOISE FIGURE SET-UP
FIGURE 3. BLOCK DIAGRAMS OF POWER-GAIN AND NOISE-FIGURE TEST SET-UPS
5-3
CA3127
Typical Performance Curves
T
A
= 25
o
C
V
CE
= 6V
R
SOURCE
= 500Ω
f = 10Hz
30
T
A
= 25
o
C
V
CE
= 6V
R
SOURCE
= 1kΩ
f = 10Hz
f = 100Hz
30
NOISE FIGURE (dB)
20
NOISE FIGURE (dB)
f = 100Hz
20
f = 10kHz
10
f = 1kHz
f = 1kHz
10
f = 10kHz
f = 100kHz
f = 100kHz
0
0.01
0.1
1.0
COLLECTOR CURRENT (mA)
0
0.01
0.1
1.0
COLLECTOR CURRENT (mA)
FIGURE 4. NOISE FIGURE vs COLLECTOR CURRENT
FIGURE 5. NOISE FIGURE vs COLLECTOR CURRENT
BASE-TO-EMITTER VOLTAGE (V)
T
A
= 25
o
C
V
CE
= 6V
GAIN-BANDWIDTH PRODUCT (GHz)
1.0
T
A
= -55
o
C
0.9
0.8
0.7
T
A
= 125
o
C
0.6
T
A
= 25
o
C
1.2
1.1
1.0
0.9
0.8
0
1
2
3
4
5
6
7
8
9
10
COLLECTOR CURRENT (mA)
0.5
0.4
0.1
1
COLLECTOR CURRENT (mA)
10
FIGURE 6. GAIN-BANDWIDTH PRODUCT vs COLLECTOR
CURRENT
FIGURE 7. BASE-TO-EMITTER VOLTAGE vs COLLECTOR
CURRENT
T
A
= 25
o
C
f = 1MHz
2.25
2.00
CAPACITANCE (pF)
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0
1
2
3
4
5
C
EB
C
CB
6
7
8
9
10
C
CI
CAPACITANCE (pF)
TRAN-
SISTOR
C
CB
C
CE
C
EB
C
CI
PKG TOTAL PKG TOTAL PKG TOTAL PKG TOTAL
BIAS
(V)
Q
1
Q
2
Q
3
Q
4
Q
5
BIAS VOLTAGE (V)
-
6V
-
6V
-
4V
-
6V
0.025 0.190 0.090 0.125 0.365 0.610 0.475 1.65
0.015 0.170 0.225 0.265 0.130 0.360 0.085 1.35
0.040 0.200 0.215 0.240 0.360 0.625 0.210 1.40
0.040 0.190 0.225 0.270 0.365 0.610 0.085 1.25
0.010 0.165 0.095 0.115 0.140 0.365 0.090 1.35
FIGURE 8A. CAPACITANCE vs BIAS VOLTAGE FOR Q
2
FIGURE 8B. TYPICAL CAPACITANCE VALUES AT f = 1MHz.
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