73S8014R-ILR/F2 datasheet, PDF

Datasheet> All Categories > Analog mixed-signal IC> The signal circuit> 73S8014R-ILR/F2

73S8014R-ILR/F2: DescriptionI/O controller interface IC smart card interface comp w/8024; CategoryAnalog mixed-signal IC The signal circuit; File Size276KB，29 Pages; ManufacturerMaxim; Websitehttps://www.maximintegrated.com/en.html

Download Datasheet Parametric Compare View All

73S8014R-ILR/F2 Overview

I/O controller interface IC smart card interface comp w/8024

73S8014R-ILR/F2 Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Maxim
package instruction	,
Reach Compliance Code	compliant
ECCN code	EAR99
Analog Integrated Circuits - Other Types	ANALOG CIRCUIT
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Maximum time at peak reflow temperature	NOT SPECIFIED
Base Number Matches	1

Preview

Download Datasheet

View All

73S8014R

Smart Card Interface

Simplifying System Integration™

DATA SHEET

September 2008

DESCRIPTION

The Teridian 73S8014R is a single smart card (ICC) interface

circuit, firmware compatible with 8024-type devices for

configurations where only asynchronous cards must be

supported. It is derived from the 73S8024RN industry-

standard electrical interface. The 73S8014R has been

optimized to match most of the typical Set-Top-Box / A/V

Conditional Access applications. Optimization essentially

involved a smaller pin-count, support for single I/O, and

maximum card current of 65mA (ISO-7816 / EMV

compliance).

The 73S8014R interfaces with the host processor through the

same bus (digital I/Os) as the 73S8024RN, which is

compatible with any other 8024-type IC.

As a result, the

73S8014R is a very attractive cost-reduction path from

traditional 8024 ICs.

The 73S8014R has been designed to

provide full electrical compliance with ISO 7816-3 and EMV

4.0 specifications.

Interfacing with the system controller is done through a

control bus, composed of digital inputs to control the

interface, and one interrupt output to inform the system

controller of the card presence and faults.

The card clock can be generated by an on-chip oscillator

using an external crystal or by connection to an externally

supplied clock signal.

The 73S8014R incorporates an ISO 7816-3

activation/deactivation sequencer that controls the card

signals. Level-shifters drive the card signals with the

selected card voltage (3V or 5V), coming from an internal

Low Drop-Out (LDO) voltage regulator. This LDO regulator is

. Digital

circuitry is powered separately by a digital power supply V

With its embedded LDO regulator, the 73S8024RN is a

cost-effective solution for any application where a 5V

(typically -5% +10%) power supply is available.

Emergency card deactivation is initiated upon card extraction

or upon any fault detected by the protection circuitry. The

fault can be a card over-current, VCC undervoltage or power

supply fault (V

). The card over-current circuitry is a true

current detection function, as opposed to V

voltage drop

detection, as usually implemented in non-Teridian 8024

interface ICs.

The V

voltage fault has a threshold voltage that can be

adjusted with an external resistor network. It allows

automated card deactivation at a customized V

voltage

threshold value. It can be used, for instance, to match the

system controller operating voltage range.

APPLICATIONS

•

Set-Top-Box Conditional Access and Pay-per-View

General purpose smart card readers

ADVANTAGES

•

Same advantages as the Teridian 73S80xxR family:

VCC card generated by an LDO regulator

Very low power dissipation (saves up to 1/2W)

Fewer external components are required

Better noise performance

True card over-current detection

Firmware compatibility with all 8024 ICs

Small format 20SO package

•

FEATURES

•

Card Interface:

Complies with ISO 7816-3 and EMV 4.0

Supports 3V / 5V cards

ISO 7816-3 Activation / Deactivation sequencer

Automated deactivation upon hardware fault (i.e. upon

drop on V

power supply or card overcurrent)

The V

voltage supervisor threshold value (fault) can

be externally adjusted

Over-current detection 130mA max

Card CLK clock frequency up to 20MHz

System Controller Interface:

3 Digital inputs control the card activation /

deactivation, card reset and card voltage

2 Digital inputs control the card clock frequency

1 Digital output, interrupt to the system controller,

reports to the host the card presence and faults

Crystal oscillator or host clock, up to 27MHz

Regulator Power Supply:

4.75V to 5.5V

Digital Interfacing: 2.7V to 5.5V

6kV ESD protection on the card interface

Package: SO 20-pin

RoHS compliant (6/6) lead-free package

•

Rev. 1.0

DS_8014R_012

73S8014R Data Sheet

Table of Contents

Pinout ................................................................................................................................................................ 5

Electrical Specifications .................................................................................................................................. 8

2.1

Absolute Maximum Ratings ........................................................................................................................ 8

2.2

Recommended Operating Conditions ......................................................................................................... 8

2.3

Package Thermal Parameters .................................................................................................................... 9

2.4

Smart Card Interface Requirements ........................................................................................................... 9

2.5

Characteristics: Digital Signals.................................................................................................................. 11

2.6

DC Characteristics .................................................................................................................................... 12

2.7

Voltage Fault Detection Circuits ................................................................................................................ 13

Applications Information ............................................................................................................................... 14

3.1

Example 73S8014R Schematics .............................................................................................................. 14

3.2

System Controller Interface....................................................................................................................... 16

3.3

Power Supply and Voltage Supervision .................................................................................................... 16

3.4

Card Power Supply ................................................................................................................................... 17

3.5

On-Chip Oscillator and Card Clock ........................................................................................................... 17

3.6

Activation Sequence ................................................................................................................................. 18

3.7

Deactivation Sequence ............................................................................................................................. 19

3.8

Fault Detection and

OFF

........................................................................................................................... 20

3.9

I/O Circuitry and Timing ............................................................................................................................ 20

Equivalent Circuits ......................................................................................................................................... 22

Mechanical Drawing ....................................................................................................................................... 27

Ordering Information ..................................................................................................................................... 28

Related Documentation ................................................................................................................................. 28

Contact Information ....................................................................................................................................... 28

Rev. 1.0

73S8014R Data Sheet

DS_8014R_012

Figures

Figure 1: 73S8014R Block Diagram .......................................................................................................................... 2

Figure 2: 73S8014R 20-SOP Pin Out........................................................................................................................ 5

Figure 3: 73S8014R – Typical Application Schematic ............................................................................................ 15

Figure 4: Activation Sequence – RSTIN Low When

CMDVCC

Goes Low ............................................................. 18

Figure 5: Activation Sequence – RSTIN High When

CMDVCC

Goes Low............................................................. 19

Figure 6: Deactivation Sequence ............................................................................................................................ 19

Figure 7: Timing Diagram – Management of the Interrupt Line

OFF

...................................................................... 20

Figure 8: I/O and I/OUC State Diagram................................................................................................................... 21

Figure 9: I/O – I/OUC Delays – Timing Diagram ..................................................................................................... 21

Figure 10: Open Drain type –

OFF

.......................................................................................................................... 22

Figure 11: Power Input/Output Circuit, VDD, VPC, VCC ........................................................................................ 22

Figure 12: Smart Card CLK Driver Circuit ............................................................................................................... 23

Figure 13: Smart Card RST Driver Circuit ............................................................................................................... 23

Figure 14: Smart Card IO Interface Circuit .............................................................................................................. 24

Figure 15: Smart Card IOUC Interface Circuit ......................................................................................................... 24

Figure 16: General Input Circuit .............................................................................................................................. 25

Figure 17: Oscillator Circuit ..................................................................................................................................... 25

Figure 18: VDDF_ADJ ............................................................................................................................................. 26

Figure 19: Mechanical Drawing 20-Pin SO Package .............................................................................................. 27

Tables

Table 1: 73S8014R 20-Pin SOP Pin Definitions ....................................................................................................... 6

Table 2: Absolute Maximum Device Ratings ............................................................................................................. 8

Table 3: Recommended Operating Conditions ......................................................................................................... 8

Table 4: Package Thermal Parameters ..................................................................................................................... 9

Table 5: DC Smart Card Interface Requirements ..................................................................................................... 9

Table 6: Digital Signals Characteristics ................................................................................................................... 11

Table 7: DC Characteristics ..................................................................................................................................... 12

Table 8: Voltage Fault Detection Circuits ................................................................................................................ 13

Table 9: Order Numbers and Packaging Marks ...................................................................................................... 28

Rev. 1.0

73S8014R-ILR/F2 Related Products

	73S8014R-ILR/F2	73S8014R-IL/F2	73S8014RT-ILR/F	73S8014RT-ILR-F	73S8014RT-DB
Description	I/O controller interface IC smart card interface comp w/8024	I/O controller interface IC smart card interface comp w/8024	I/O controller interface IC smart card interface comp w/8024	I/O Controller Interface IC Smart Card Interface Comp w/8024	Interface Development Tools 73S8014RT Demo Brd
Packaging	-	-	Reel	Reel	Bulk
Product Category	-	-	I/O Controller Interface IC	I/O Controller Interface IC	Interface Development Tools
RoHS	-	-	Yes	Details	Details
Factory Pack Quantity	-	-	1500	1500	1

Recommended Resources

Typical operation display circuit

Piezoelectric pump drive circuit diagram

300-3000HZ adjustable four-function filter circuit

SCR overcurrent protection circuit using Hall element

Roxy M15M movement protection circuit

Closed-loop three-phase multivibrator

Very useful, a summary of RF dry goods (worth collecting): [align=left]Want to become an excellent microwave RF engineer? Come and see: RF dry goods summary. [/align] [align=left]With the advent of China's 5G era, narrowband Internet of Things applications (C...; alan000345 RF/Wirelessly

Work (II) Implementation of Linear and Nonlinear Signal Source Based on MCU + FPGA: # Work (II) Implementation of Linear and Nonlinear Signal Source Based on MCU + FPGA## 1. Introduction of Signal Source###1.1 Classification of Signal Source Modulation Methods ###1.2 AM Amplitude Mod...; bqgup Innovation Lab

[GD32L233C-START Review] 5. Flash Read and Write - Using Internal Flash to Store Data: related articles: [GD32L233C-START Review] 1. GD32L233C-START with obvious advantages and disadvantages (unboxing) [GD32L233C-START Review] 2. Non-blocking way to light up, blink, blink, blink... [GD3...; freeelectron GD32 MCU

Preliminary analysis of DSP functions 101103: The file structure in the routine, the following is an analysis of the source file: DSP28_ADC.C Initialization function of peripheral AD, related to peripheral AD DSP28_CpuTimers.C CPU timer initializ...; 火辣西米秀 DSP and ARM Processors

MOS tube packaging types and packaging and improvements of mainstream companies: [i=s] This post was last edited by qwqwqw2088 on 2018-12-24 09:04 Edit [/i] [size=4] After the MOS tube chip is made, it is necessary to add a shell to the MOS tube chip, which is the MOS tube package...; qwqwqw2088 Analogue and Mixed Signal

【RPi PICO】MicroPython driving ws2812: [i=s]This post was last edited by dcexpert on 2021-2-7 14:16[/i]Currently, the STM and RPi versions do not include the neopixel module, so they cannot drive the ws2812 like the ESP32. However, in the ...; dcexpert MicroPython Open Source section

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components