services. Field-programmable devices are designated with an ‘F’
in the part number. They are intended for quick prototyping and
inventory reduction.
You can download the software and programmer kit hardware
from
www.cypress.com
by clicking the hyperlinks in the previous
paragraph.
Pin 1: Output Enable (OE) or Power-Down (PD#)
Pin 1 is programmed as either OE or PD#. The OE function is
used to enable or disable the CLK output quickly, but it does not
reduce core power consumption. The PD# function puts the
device into a low-power state, but the wake-up takes longer
because the PLL must reacquire the lock.
Industrial versus Commercial Device Performance
Industrial and commercial devices have different internal
crystals. They have a potentially significant impact on
performance levels for applications requiring the lowest possible
phase noise. CyClockWIzard software allows the user to select
between and view the expected performance of both options.
Table 2. Device Programming Variables
Variable
Output frequency
Pin 1 function (OE or PD#)
Temperature range (commercial or industrial)
Factory Configured CY2X013
For ready-to-use devices, the CY2X013 is available with no field
programming required. Pre-configured devices (see
Standard
and Application-Specific Factory Configurations)
are available
for samples or orders, or a request for a custom configuration
can be made. All requests are submitted to the local Cypress
field application engineer (FAE) or sales representative. After the
request is processed, the user receives a new part number,
samples, and datasheet with the programmed values. This part
number is used for additional sample requests and production
orders. The CY2X013 is one-time programmable (OTP).
Document Number: 001-10261 Rev. *G
Page 3 of 10
[+] Feedback
CY2X013
Absolute Maximum Conditions
Parameter
V
DD
V
IN[1]
T
S
T
J
ESD
HBM
Θ
JA[2]
Supply voltage
Input voltage, DC
Temperature, storage
Temperature, junction
Electrostatic discharge (ESD) protection
human body model (HBM)
Thermal resistance, junction to ambient
JEDEC Std 22-A114-B
0 m/s airflow
Relative to V
SS
Non operating
Description
Condition
Min
–0.5
–0.5
–55
–40
2000
64
Max
4.4
V
DD
+ 0.5
135
135
–
Unit
V
V
°C
°C
V
°C / W
Operating Conditions
Parameter
V
DD
T
PU
T
A
3.3 V supply voltage range
2.5 V supply voltage range
Power-up time for V
DD
to reach minimum specified voltage (power ramp is
monotonic)
Ambient temperature (commercial)
Ambient temperature (industrial)
Description
Min
3.0
2.375
0.05
0
–40
Typ
3.3
2.5
–
–
–
Max
3.6
2.625
500
70
85
Unit
V
V
ms
°C
°C
DC Electrical Characteristics
Parameter
I
DD[3]
Description
Operating supply current
Condition
V
DD
= 3.6 V, OE/PD# = V
DD
,
output terminated
V
DD
= 2.625 V, OE/PD# = V
DD
,
output terminated
Min
–
–
–
247
Typ
–
–
–
–
Max
125
120
200
454
Unit
mA
mA
μA
mV
I
SB
V
OD
ΔV
OD
V
OS
ΔV
OS
I
OZ
V
IH
V
IL
I
IH
I
IL
Standby supply current
LVDS differential output voltage
PD# = V
SS
V
DD
= 3.3 V or 2.5 V,
R
TERM
= 100
Ω
between CLK and
CLK#
V
DD
= 3.3 V or 2.5 V,
R
TERM
= 100
Ω
between CLK and
CLK#
V
DD
= 3.3 V or 2.5 V,
R
TERM
= 100
Ω
between CLK and
CLK#
V
DD
= 3.3 V or 2.5 V,
R
TERM
= 100
Ω
between CLK and
CLK#
Tri-state output, unterminated,
measured on one pin while floating
the other pin, PD#/OE = V
SS
Change in V
OD
between complementary
output states
LVDS offset output voltage
–
–
50
mV
1.125
–
1.375
V
Change in V
OS
between complementary
output states
LVDS output leakage current
–
–
50
mV
μA
–35
–
35
Input high voltage
Input low voltage
Input high current
Input low current
Input = V
DD
Input = V
SS
0.7 × V
DD
–
–
–
–
–
–
–
–
0.3 × V
DD
115
50
V
V
μA
μA
C
IN[3]
Input capacitance, OE/PD# pin
–
15
–
pF
Notes
1. The voltage on any input or I/O pin cannot exceed the power pin during power-up.
2. Simulated. The board is derived from the JEDEC multilayer standard. It measures 76 x 114 x 1.6 mm and has 4-layers of copper (2/1/1/2 oz.). The internal layers
are 100% copper planes, while the top and bottom layers have 50% metalization. No vias are included in the model.
3. I
DD
includes ~4 mA of current that is dissipated externally in the output termination resistors.
Document Number: 001-10261 Rev. *G
Page 4 of 10
[+] Feedback
CY2X013
AC Electrical Characteristics
The following table lists the AC electrical specifications for this device.
[4]
Parameter
F
OUT
FSC
FSI
AG
T
DC
T
R
, T
F
T
OHZ
T
OE
T
LOCK
Description
Output frequency
[5]
Frequency stability, commercial
devices
[6]
Frequency stability, industrial
devices
[6]
Aging, 10 years
Output duty cycle
Output rise and fall time
Output disable time
Output enable time
Startup time
F <= 450 MHz, measured at zero crossing
F > 450 MHz, measured at zero crossing
20% and 80% of full output swing
Time from falling edge on OE to stopped
outputs (asynchronous)
Time from rising edge on OE to outputs at
a valid frequency (asynchronous)
Time for CLK to reach valid frequency
measured from the time
V
DD
= V
DD
(min) or from PD# rising edge
F
OUT
= 106.25 MHz (12 kHz to 20 MHz)
Pre-defined factory configurations
[7]
V
DD
= min to max, T
A
= 0 °C to 70 °C
V
DD
= min to max, T
A
= –40 °C to 85 °C
Condition
Min
50
–
–
–
45
40
–
–
–
–
Typ
–
–
–
–
50
50
0.35
–
–
–
Max
690
±35
±55
±15
55
60
1.0
100
120
5
Unit
MHz
ppm
ppm
ppm
%
%
ns
ns
ns
ms
T
Jitter(φ)
RMS phase jitter (random)
–
1
See Note 7
–
ps
ps
Switching Waveforms
Figure 2. Output Voltage Swing
CLK#
V
OD1
CLK
ΔV
OD
= V
OD1
- V
OD2
Figure 3. Output Offset Voltage
CLK
V
OD2
50
Ω
50
Ω
CLK#
V
OS
Notes
4. Not 100% tested, guaranteed by design and characterization.
5. This parameter is specified in the CyClockWizard software.
6. Frequency stability is the maximum variation in frequency from F
0
. It includes initial accuracy, and variation from temperature and supply voltage.
7. Typical phase noise specs for factory programmed devices are listed in the
Standard and Application-Specific Factory Configurations
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