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LTC2911IDDB-1#TRM

Description
Power Supply Support Circuit, Adjustable, 3 Channel, CMOS, PDSO8
CategoryPower/power management    The power supply circuit   
File Size250KB,20 Pages
ManufacturerADI
Websitehttps://www.analog.com
Download Datasheet Parametric View All

LTC2911IDDB-1#TRM Overview

Power Supply Support Circuit, Adjustable, 3 Channel, CMOS, PDSO8

LTC2911IDDB-1#TRM Parametric

Parameter NameAttribute value
Objectid4002719188
package instructionHVSON,
Reach Compliance Codecompliant
ECCN codeEAR99
Other featuresRESET THRESHOLD VOLTAGE IS 3.086V, 4.675V
Adjustable thresholdYES
Analog Integrated Circuits - Other TypesPOWER SUPPLY SUPPORT CIRCUIT
JESD-30 codeR-PDSO-N8
JESD-609 codee0
length3 mm
Number of channels3
Number of functions1
Number of terminals8
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeHVSON
Package shapeRECTANGULAR
Package formSMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
Maximum seat height0.8 mm
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationDUAL
Threshold voltage nominal+3.086V
width2 mm
FEATURES
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LTC2911
Precision Triple Supply
Monitor with Power-Fail
Comparator
DESCRIPTION
The LTC
®
2911 is a low power, high accuracy triple supply
monitor with a power-fail comparator. Reset timeout may
be selected with an external capacitor or set to an internally
generated 200ms.
The V1 pin monitors a 3.3V supply. The V2 pin monitors a
5V, 2.5V, 1.8V, 1.2V or adjustable supply. A third adjustable
input has a nominal 0.5V threshold allowing a resistive
divider to configure its threshold. All three comparators
feature a tight 1.5% threshold accuracy over the entire
operating temperature range while a glitch filter ensures
reliable reset operation.
A spare comparator can be configured to provide early
warning of a low voltage condition. It causes the
PFO
output
to pull low when the voltage of the PFI input falls below 0.5V,
allowing the power-fail threshold to be configured with
a resistive divider. A latch feature on the TMR pin allows
the
RST
output to be latched to prevent system resets,
simplifying margin testing.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including 6949965, 7292076.
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Ultralow Voltage Reset: V
CC
= 0.5V Guaranteed
Monitors Three Inputs Simultaneously:
3.3V, 5V, ADJ (LTC2911-1)
3.3V, 2.5V, ADJ (LTC2911-2)
3.3V, 1.8V, ADJ (LTC2911-3)
3.3V, 1.2V, ADJ (LTC2911-4)
3.3V, ADJ, ADJ (LTC2911-5)
±1.5% Threshold Accuracy
Power-Fail Monitor
RST
State Can Be Held for Margining
Low Supply Current: 30µA Typical
Input Glitch Immunity
Adjustable Reset Timeout Period
Selectable Internal Timeout Saves Components
Space Saving 8-Lead TSOT-23 and 3mm
×
2mm DFN
Packages
APPLICATIONS
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Network Servers
Desktop and Notebook Computers
Automotive and Industrial Electronics
TYPICAL APPLICATION
RST
Output Voltage With 10k Pull-Up to V1
3.3V
2.5V
DC/DC
CONVERTER 1.0V
TMR
V1
76.8k
RESET
LOBAT
10k
V
RST
(V)
SYSTEM
LOGIC
6
5
4
3
2
1
t
RST
= 200ms
2911 TA01a
V1 = V2
RST
V2
PFO
LTC2911-2
ADJ
PFI
+
Li-Ion
BATTERY
STACK
576k
100k
100k
GND
0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
V1 (V)
2911 TA01b
2911f
1

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