KH210-810B1K datasheet, PDF - EEWORLD Datasheet

KH210-810B1K: DescriptionFixed Resistor, Wire Wound, 7W, 1000ohm, 10% +/-Tol, -10,10ppm/Cel,; CategoryPassive components The resistor; File Size626KB，4 Pages; ManufacturerVitrohm Portuguesa LDA; Environmental Compliance

Download Datasheet Parametric View All

KH210-810B1K Overview

Fixed Resistor, Wire Wound, 7W, 1000ohm, 10% +/-Tol, -10,10ppm/Cel,

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Objectid	938961039
Reach Compliance Code	compliant
Country Of Origin	Portugal
ECCN code	EAR99
YTEOL	7.1
structure	Ceramic Case
Lead diameter	0.8 mm
Lead length	36 mm
Installation features	THROUGH HOLE MOUNT
Number of terminals	2
Maximum operating temperature	350 °C
Minimum operating temperature	-55 °C
Package height	6.4 mm
Package length	38 mm
Package shape	RECTANGULAR PACKAGE
Package form	Axial
Package width	6.4 mm
method of packing	BULK
Rated power dissipation(P)	7 W
Rated temperature	70 °C
resistance	1000 Ω
Resistor type	FIXED RESISTOR
surface mount	NO
technology	WIRE WOUND
Temperature Coefficient	10 ppm/°C
Terminal shape	WIRE
Tolerance	10%
Operating Voltage	83.67 V

Common power symbols and their meanings: Power symbols, are you still confused? Commonly used power symbols are attached! In circuit design, there are always various power symbols, which often confuse people. Today, the editor has sorted out...; 成都亿佰特 Switching Power Supply Study Group

EEWORLD University - Teach you how to learn LittleVGL: Teach you how to learn LittleVGL step by step : https://training.eeworld.com.cn/course/5682LittlevGL is a free and open source graphics library that provides everything you need to create embedded GUI...; 桂花蒸 MCU

Altera SoC Architecture Excerpt - Altera SoC FPGA Adaptive Debug.pdf: Altera SoC Architecture Excerpt - Altera SoC FPGA Adaptive Debug...; 雷北城 FPGA/CPLD

5. Common Emitter Amplifier Circuit: 1. The structure of the triode, the relationship between the currents of each pole of the triode, the characteristic curve, and the amplification conditions. 2. The role of components, the purpose of ...; wang27349715 Analog electronics

CPLD technology and its application.pdf: CPLD technology and its application.pdf...; zxopenljx EE_FPGA Learning Park

FPGA Design and Implementation of HDLC Control Protocol.pdf: FPGA Design and Implementation of HDLC Control Protocol.pdfClear Format...; zxopenljx EE_FPGA Learning Park

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components