Product
Folder
Order
Now
Technical
Documents
Tools &
Software
Support &
Community
OPA4277-SP
SBOS771A – DECEMBER 2016 – REVISED JANUARY 2019
OPA4277-SP Radiation Hardened High-Precision Operational Amplifier
1 Features
1
•
•
•
•
•
•
•
•
•
QMLV Qualified:
5962-16209
– Radiation Hardness Assurance (RHA) up to
Total Ionizing Dose (TID) 50 krad(Si)
– ELDRS-Free (See
Radiation Report)
– Single Event Latchup (SEL) Immune to LET =
85 MeV-cm
2
/mg
Ultra-Low Offset Voltage: 20 µV
Ultra-Low Drift: ±0.15 µV/°C
High Open-Loop Gain: 134 dB
High Common-Mode Rejection: 140 dB
High-Power Supply Rejection: 130 dB
Wide Supply Range: ±2 to ±18 V
Low-Quiescent Current: 800 µA/Amplifier
Available in 14-lead CFP With Industry Standard
Quad Operational Amplifier Pinout
The OPA4277-SP operates from ±2- to ±18-V
supplies with excellent performance. Unlike most
operational amplifiers which are specified at only one
supply
voltage,
the
OPA4277-SP
precision
operational amplifier is specified for real-world
applications; a single limit applies over the ±5- to ±15-
V supply range. High performance is maintained as
the amplifier swings to the specified limits.
The OPA4277-SP is easy to use and free from phase
inversion and overload problems found in some
operational amplifiers. It is stable in unity gain and
provides excellent dynamic behavior over a wide
range of load conditions. The OPA4277-SP features
completely independent circuitry for lowest crosstalk
and freedom from interaction, even when overdriven
or overloaded.
Device Information
(1)
PART NUMBER
5962L1620901VYC
5962L1620901VXA
5962L1620901V9A
OPA4277HFR/EM
Engineering
Samples
(3)
GRADE
50 krad(Si)
ELDRS-free
PACKAGE
14-lead CFP (HFR)
28-lead CDIP (JDJ)
KGD
(2)
14-lead CFP (HFR)
2 Applications
•
•
•
Space Satellite Temperature and Position Sensing
High-Accuracy Space Instrumentation
Space Precision and Scientific Applications
– Transducer Amplifier
– Bridge Amplifier
– Strain Gage Amplifier
– Precision Integrator
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
(2) KGD = known good die.
(3) These units are intended for engineering evaluation only.
They are processed to a noncompliant flow. These units are
not suitable for qualification, production, radiation testing or
flight use. Parts are not warrantied for performance over the
full MIL specified temperature range of –55°C to 125°C or
operating life.
3 Description
The OPA4277-SP precision operational amplifier
replaces the industry standard LM124-SP. It offers
improved noise and two orders of magnitude lower
input offset voltage. Features include ultra-low offset
voltage and drift, low-bias current, high common-
mode rejection, and high-power supply rejection.
Simplified Schematic
R
2
R
1
OPA4277-SP
No bias current
cancellation resistor
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
OPA4277-SP
SBOS771A – DECEMBER 2016 – REVISED JANUARY 2019
www.ti.com
Table of Contents
1
2
3
4
5
6
Features
..................................................................
Applications
...........................................................
Description
.............................................................
Revision History.....................................................
Pin Configuration and Functions
.........................
1
1
1
2
3
7.3 Feature Description.................................................
13
7.4 Device Functional Modes........................................
14
8
Application and Implementation
........................
15
8.1 Application Information............................................
15
8.2 Typical Application ..................................................
15
5.1 Bare Die Information .................................................
5
Specifications.........................................................
6
6.1
6.2
6.3
6.4
6.5
6.6
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions ......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
6
6
6
6
7
9
9 Power Supply Recommendations......................
17
10 Layout...................................................................
17
10.1 Layout Guidelines .................................................
17
10.2 Layout Example ....................................................
18
11 Device and Documentation Support
.................
19
11.1
11.2
11.3
11.4
11.5
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
19
19
19
19
19
7
Detailed Description
............................................
13
7.1 Overview .................................................................
13
7.2 Functional Block Diagram .......................................
13
12 Mechanical, Packaging, and Orderable
Information
...........................................................
20
4 Revision History
Changes from Original (December 2016) to Revision A
•
•
•
•
•
Page
Changed
Features
section .....................................................................................................................................................
1
Added new device packages..................................................................................................................................................
1
Updated
Pin Configurations and Functions
section ...............................................................................................................
3
Updated
Recommended Operating Conditions
table .............................................................................................................
6
Updated
Figure 3.................................................................................................................................................................... 9
2
Submit Documentation Feedback
Product Folder Links:
OPA4277-SP
Copyright © 2016–2019, Texas Instruments Incorporated
OPA4277-SP
www.ti.com
SBOS771A – DECEMBER 2016 – REVISED JANUARY 2019
5 Pin Configuration and Functions
HFR Package
14-Pin CFP
Top View
OUT A
–IN A
+IN A
V+
+IN B
–IN B
OUT B
1
2
3
4
5
6
7
14
13
12
11
10
9
8
OUT D
–IN D
+IN D
V–
+IN C
–IN C
OUT C
Not to scale
Pin Functions: CFP
PIN
NO.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
NAME
OUT A
–IN A
+IN A
V+
+IN B
–IN B
OUT B
OUT C
–IN C
+IN C
V–
+IN D
–IN D
OUT D
I/O
O
I
I
—
I
I
O
O
I
I
—
I
I
O
Output channel A.
Inverting input channel A.
Noninverting input channel A.
Positive (highest) power supply.
Noninverting input channel B.
Inverting input channel B.
Output channel B.
Output channel C.
Inverting input channel C.
Noninverting input channel C.
Negative (lowest) power supply.
Noninverting input channel D.
Inverting input channel D.
Output channel D.
DESCRIPTION
Copyright © 2016–2019, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links:
OPA4277-SP
3
OPA4277-SP
SBOS771A – DECEMBER 2016 – REVISED JANUARY 2019
www.ti.com
JDJ Package
28-Pin CDIP
Top View
NC
OUT A
NC
NC
±IN
A
+IN A
+VS
NC
+IN B
±IN
B
NC
NC
OUT B
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
NC
OUT D
NC
NC
±IN
D
+IN D
±VS
NC
±IN
C
+IN C
NC
NC
OUT C
NC
Not to scale
NC - no internal connection
Pin Functions: CDIP
PIN
NO.
1, 3, 4, 8,
11, 12, 14,
15, 17, 18,
21, 25, 26,
28
2
5
6
7
9
10
13
16
19
20
22
23
24
27
NAME
I/O
DESCRIPTION
NC
—
Not connected.
OUT A
–IN A
+IN A
+VS
+IN B
–IN B
OUT B
OUT C
+IN C
–IN C
–VS
+IN D
–IN D
OUT D
O
I
I
—
I
I
O
O
I
I
—
I
I
O
Output (channel A).
Inverting input (channel A).
Noninverting input (channel A).
Positive (highest) power supply.
Inverting input (channel B).
Noninverting input (channel B).
Output (channel B).
Output (channel C).
Inverting input (channel C).
Noninverting input (channel C).
Negative (lowest) power supply.
Inverting input (channel D).
Noninverting input (channel D).
Output (channel D).
4
Submit Documentation Feedback
Product Folder Links:
OPA4277-SP
Copyright © 2016–2019, Texas Instruments Incorporated
OPA4277-SP
www.ti.com
SBOS771A – DECEMBER 2016 – REVISED JANUARY 2019
5.1 Bare Die Information
DIE THICKNESS
15 mils
BACKSIDE FINISH
Silicon with backgrind
BACKSIDE
POTENTIAL
Negative (lower) Power Supply
BOND PAD
METALLIZATION COMPOSITION
AlCu (0.5%)
BOND PAD
THICKNESS
990 to 1210 nm
Bond Pad Coordinates in Microns
(1)
PAD
NO.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
(1)
NAME
OUT A
–IN A
+IN A
V+
+IN B
–IN B
OUT B
OUT C
–IN C
+IN C
V–
+IN D
–IN D
OUT D
I/O
O
I
I
—
I
I
O
O
I
I
—
I
I
O
DESCRIPTION
Output channel A.
Inverting input channel A.
Noninverting input channel A.
Positive (higher) power supply.
Noninverting input channel B.
Inverting input channel B.
Output channel B.
Output channel C.
Inverting input channel C.
Noninverting input channel C.
Negative (lower) power supply.
Noninverting input channel D.
Inverting input channel D.
Output channel D.
X MIN
1791.042
1701.719
1701.719
1555.784
1706.752
1701.719
1796.074
3278.071
3362.361
3367.393
3407.651
3367.393
3362.361
3273.039
Y MIN
7290.340
6111.536
5326.505
4390.507
3462.057
2671.994
1498.222
1498.222
2671.994
3462.057
4391.765
5331.537
6111.536
7290.340
X MAX
1901.751
1807.397
1812.429
1661.461
1807.397
1807.397
1896.719
3383.748
3473.071
3473.071
3513.329
3468.038
3468.038
3383.748
Y MAX
7401.049
6217.213
5437.215
4498.700
3562.702
2777.671
1598.867
1603.900
2782.704
3567.734
4497.442
5432.182
6217.213
7401.049
Substrate must be biased to V–, negative (lower) power supply.
Copyright © 2016–2019, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links:
OPA4277-SP
5