STM32F205ZCY6 datasheet, PDF - EEWORLD Datasheet

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STM32F205ZCY6: DescriptionMCU ARM 1024KB FLASH 144LQFP; Categorysemiconductor The embedded processor and controller; File Size2MB，178 Pages; ManufacturerETC2

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STM32F205ZCY6 Overview

MCU ARM 1024KB FLASH 144LQFP

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STM32F205xx

STM32F207xx

ARM-based 32-bit MCU, 150DMIPs, up to 1 MB Flash/128+4KB RAM, USB

OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera

Datasheet

production data

Features

•

Core: ARM 32-bit Cortex™-M3 CPU (120 MHz

max) with Adaptive real-time accelerator (ART

Accelerator™ allowing 0-wait state execution

performance from Flash memory, MPU,

150 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1)

•

Memories

– Up to 1 Mbyte of Flash memory

– 512 bytes of OTP memory

– Up to 128 + 4 Kbytes of SRAM

– Flexible static memory controller that

supports Compact Flash, SRAM, PSRAM,

NOR and NAND memories

– LCD parallel interface, 8080/6800 modes

•

Clock, reset and supply management

– From 1.8 to 3.6 V application supply+I/Os

– POR, PDR, PVD and BOR

– 4 to 26 MHz crystal oscillator

– Internal 16 MHz factory-trimmed RC

– 32 kHz oscillator for RTC with calibration

– Internal 32 kHz RC with calibration

•

Low power

– Sleep, Stop and Standby modes

– V

BAT

supply for RTC, 20 × 32 bit backup

registers, and optional 4 KB backup SRAM

•

3 × 12-bit, 0.5 µs ADCs with up to 24 channels

and up to 6 MSPS in triple interleaved mode

•

2 × 12-bit D/A converters

•

General-purpose DMA: 16-stream controller

with centralized FIFOs and burst support

•

Up to 17 timers

– Up to twelve 16-bit and two 32-bit timers,

up to 120 MHz, each with up to 4

IC/OC/PWM or pulse counter and

quadrature (incremental) encoder input

•

Debug mode: Serial wire debug (SWD), JTAG,

and Cortex-M3 Embedded Trace Macrocell™

LQFP64 (10 × 10 mm)

LQFP100 (14 × 14 mm)

LQFP144 (20 × 20 mm)

LQFP176 (24 × 24 mm)

UFBGA176

(10 × 10 mm)

WLCSP64+2

(0.400 mm pitch)

•

Up to 140 I/O ports with interrupt capability:

– Up to 136 fast I/Os up to 60 MHz

– Up to 138 5 V-tolerant I/Os

•

Up to 15 communication interfaces

– Up to 3 × I

C interfaces (SMBus/PMBus)

– Up to 4 USARTs and 2 UARTs (7.5 Mbit/s,

ISO 7816 interface, LIN, IrDA, modem ctrl)

– Up to 3 SPIs (30 Mbit/s), 2 with muxed I

to achieve audio class accuracy via audio

PLL or external PLL

– 2 × CAN interfaces (2.0B Active)

– SDIO interface

•

Advanced connectivity

– USB 2.0 full-speed device/host/OTG

controller with on-chip PHY

– USB 2.0 high-speed/full-speed

device/host/OTG controller with dedicated

DMA, on-chip full-speed PHY and ULPI

– 10/100 Ethernet MAC with dedicated DMA:

supports IEEE 1588v2 hardware, MII/RMII

•

8- to 14-bit parallel camera interface

(48 Mbyte/s max.)

–

•

CRC calculation unit

•

96-bit unique ID

Table 1. Device summary

Reference

Part number

STM32F205RB, STM32F205RC, STM32F205RE,

STM32F205RF, STM32F205RG, STM32F205VB,

STM32F205VC, STM32F205VE, STM32F205VF STM32F205VG,

STM32F205ZC, STM32F205ZE, STM32F205ZF, STM32F205ZG

STM32F207IC, STM32F207IE, STM32F207IF, STM32F207IG,

STM32F207ZC, STM32F207ZE, STM32F207ZF, STM32F207ZG,

STM32F207VC, STM32F207VE, STM32F207VF, STM32F207VG

STM32F205xx

STM32F207xx

November 2013

This is information on a product in full production.

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www.st.com

Contents

STM32F20xxx

Contents

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2.1

Full compatibility throughout the family . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3.1

3.2

3.3

3.4

3.5

3.6

3.7

3.8

3.9

3.10

3.11

3.12

3.13

3.14

3.15

3.16

ARM

Cortex™-M3 core with embedded Flash and SRAM . . . . . . . . . . 18

Adaptive real-time memory accelerator (ART Accelerator™) . . . . . . . . . 18

Memory protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

CRC (cyclic redundancy check) calculation unit . . . . . . . . . . . . . . . . . . . 19

Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Multi-AHB bus matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

DMA controller (DMA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Flexible static memory controller (FSMC) . . . . . . . . . . . . . . . . . . . . . . . . 21

Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . . 21

External interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . . . . 22

Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

3.16.1

3.16.2

3.16.3

Regulator ON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Regulator OFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Regulator ON/OFF and internal reset ON/OFF availability . . . . . . . . . . 28

3.17

3.18

3.19

3.20

Real-time clock (RTC), backup SRAM and backup registers . . . . . . . . . . 28

Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

BAT

operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

3.20.1

3.20.2

3.20.3

Advanced-control timers (TIM1, TIM8) . . . . . . . . . . . . . . . . . . . . . . . . . 30

General-purpose timers (TIMx) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Basic timers TIM6 and TIM7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

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STM32F20xxx

3.20.4

3.20.5

3.20.6

Contents

Independent watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Window watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

SysTick timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

3.21

3.22

3.23

3.24

3.25

3.26

3.27

3.28

3.29

3.30

3.31

3.32

3.33

3.34

3.35

3.36

3.37

3.38

Inter-integrated circuit interface (I²C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Universal synchronous/asynchronous receiver transmitters

(UARTs/USARTs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Inter-integrated sound (I

S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

SDIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Ethernet MAC interface with dedicated DMA and IEEE 1588 support . . . 34

Controller area network (CAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Universal serial bus on-the-go full-speed (OTG_FS) . . . . . . . . . . . . . . . . 35

Universal serial bus on-the-go high-speed (OTG_HS) . . . . . . . . . . . . . . . 35

Audio PLL (PLLI2S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Digital camera interface (DCMI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

True random number generator (RNG) . . . . . . . . . . . . . . . . . . . . . . . . . . 36

GPIOs (general-purpose inputs/outputs) . . . . . . . . . . . . . . . . . . . . . . . . . 36

ADCs (analog-to-digital converters) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

DAC (digital-to-analog converter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Serial wire JTAG debug port (SWJ-DP) . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Embedded Trace Macrocell™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Pinouts and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

6.1

Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

6.1.1

6.1.2

6.1.3

6.1.4

6.1.5

6.1.6

Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

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Contents

6.1.7

STM32F20xxx

Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

6.2

6.3

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

6.3.1

6.3.2

6.3.3

6.3.4

6.3.5

6.3.6

6.3.7

6.3.8

6.3.9

6.3.10

6.3.11

6.3.12

6.3.13

6.3.14

6.3.15

6.3.16

6.3.17

6.3.18

6.3.19

6.3.20

6.3.21

6.3.22

6.3.23

6.3.24

6.3.25

6.3.26

6.3.27

6.3.28

General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

VCAP1/VCAP2 external capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

Operating conditions at power-up / power-down (regulator ON) . . . . . . 73

Operating conditions at power-up / power-down (regulator OFF) . . . . . 73

Embedded reset and power control block characteristics . . . . . . . . . . . 74

Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Wakeup time from low-power mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92

PLL spread spectrum clock generation (SSCG) characteristics . . . . . . 95

Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96

EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99

Absolute maximum ratings (electrical sensitivity) . . . . . . . . . . . . . . . . 100

I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 101

I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102

NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

TIM timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107

Communications interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

12-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121

DAC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126

Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 128

BAT

monitoring characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128

Embedded reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129

FSMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129

Camera interface (DCMI) timing specifications . . . . . . . . . . . . . . . . . . 148

SD/SDIO MMC card host interface (SDIO) characteristics . . . . . . . . . 148

RTC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149

Package characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150

7.1

7.2

Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150

Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163

4/178

Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164

DocID15818 Rev 11

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