Low Power 3.3 Volt Limiting Amplifier for
Applications up to 12.5 Gbps
M02140
Low power, high sensitivity 12.5 Gbps
limiting amplifier in 4X4 MLF package
The M02140 is a high-gain limiting amplifier for applications
up to 12.5 Gbps, and incorporates a limiting amplifier, a CML
buffer and an input signal level detection circuit. The M02140
also features a fully integrated DC-offset cancellation loop
that does not require any external components.
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K E Y F E AT U R E S
>
Wide dynamic range with
5.5 mV typical input sensitivity
at 10 Gbps
>
Received signal strength
indicator (RSSI)
>
Programmable input signal
level detect
>
Operates with +3.3 V supply
>
CML data outputs with
typical 23 ps rise and fall time
>
Wide -40 to +85 °C operating
temperature range
>
On-chip DC offset
cancellation circuit
The user is provided with the flexibility to set the output
amplitude levels and the signal detect threshold. Optional
output buffer disable (squelch/jam) can be implemented
using the power down (PWDN) input.
The output swing is linearly proportional to the value of
R
AMPSET
. It is possible to set the output voltage swing linearly
between 400 mVpp differential and 800 mVpp differential,
The data inputs are internally biased to VCC via 50Ω
resistors, and may be AC or DC-coupled. Note that if the
inputs are AC-coupled, the coupling capacitor should be of
sufficient value to pass the lowest frequencies of interest,
bearing in mind the number of consecutive identical bits, and
the input resistance (The use of a 2 to 10 nF capacitor is
recommended). The coupling capacitor should also be of
sufficient quality as to pass the high frequency content of
the input data stream.
The RSSI output voltage is proportional to the log of the
input signal amplitude (the RSSI output voltage is linearly
proportional to the optical modulation amplitude (OMA)). An
external 4.7 nF capacitor must be connected from the RSSI
output to VCC. The capacitor integrates the RSSI output
and also sets the loss of signal reaction time. The RSSI
The M02140 contains internal DC feedback requiring no
external components to remove the effects of DC offsets
and to act as a DC auto-zero circuit. This circuit is config-
ured such that the feedback is effective only at frequencies
well below the lowest frequency of interest. The low
frequency cut off is typically less than 50 kHz.
Using an external resistor, R
LOS
,
between pin LOS
SET
and VCC,
the user can program the input signal threshold. The signal
detect status is indicated on the LOS and ST open-drain
output pins. The LOS signal is active when the signal is below
the threshold value, ST is active when the signal is above the
threshold value.
voltage is compared with a selectable reference to deter-
mine loss of signal as described in the next section.
when the outputs are properly terminated. See the applica-
tions information section for further details on setting the
output swing amplitude.
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RLOS establishes a threshold voltage at the LOS
SET
pin. The input
signal develops a voltage at the RSSI pin. This voltage is propor-
tional to the input signal peak-to-peak value. The voltage at LOS
SET
is internally compared to the voltage at the RSSI (V(RSSI)) pin.
When the voltage at V(RSSI) is less than V(LOS
SET
), LOS is asserted
(ST de-asserted) and will stay asserted until the input signal level
increases by a predefined amount of hysteresis. When the input
level increases by more than this hysteresis, LOS is
de-asserted (ST asserted)
allow data to propagate only when the signal is above the user's
bit-error-rate requirement. It therefore inhibits the data outputs
toggling due to noise when there is no signal present ("squelch").
In order to implement this function, LOS should be connected to
the PWDN pin, thus forcing the data outputs to
VCC when the signal falls below the threshold.
The M02140 contains an accurate on-chip bias circuit requiring an
external 12.1 k–Ω 1% resistor, R
REF
, from pin I
REF
to ground to
define an on-chip reference current.
When asserted, the active high PWDN pin forces the outputs to a
high state. This ensures that no data is propagated through the
system. The loss of signal detection circuit can be used to auto-
matically force the data outputs to a high state when the input
signal falls below the threshold. The function is normally used to
The output circuit is basically a differential pair with a tail current
of I
TAIL
. The load of the differential pair is formed by the parallel
combination of R
OUT
and R
LOAD
for high frequencies where the
output AC-coupling capacitor can be considered as a short circuit
(50 || 50 = 25Ω).
V CCP
AMPSET
VCCD
The required minimum voltage swing sets I
TAIL
which determines
the output power consumption. The minimum voltage swing
50W
50W
Amplitude
Control
50
50
depends on the application. Therefore, M02140 provides the user
the flexibility to optimize the voltage swing and the output power
DOUT N
DOUT N
D IN P
D IN N
Limiting
Amplifier
consumption in his own application by setting I
TAIL
using an external
resistor (R
AMPSET)
.
CML
Buffer
CMOS
Buffer
Level
Detector
Threshold
Setting
Circuit
PWDN
ST
Comparator
LOS
Biasing
IREF
RSSI
LOS SET
M02140 Block Diagram
Product Features
Applications
• STM-64/OC-192 SDH/SONET
• SDH/SONET with single or double FEC
• 10G Ethernet
• 10G Fiber Channel
• XFP
www.mindspeed.com/salesoffices
General Information: (949) 579-3000
Headquarters – Newport Beach
4000 MacArthur Blvd., East Tower
Newport Beach, CA 92660-3007
02140-BRF-001-A M04-0935
© 2004 Mindspeed Technologies
™
. All rights reserved. Mindspeed and the Mindspeed
logo are trademarks of Mindspeed Technologies. All other trademarks are the prop-
erty of their respective owners. Although Mindspeed Technologies strives for accu-
racy in all its publications, this material may contain errors or omissions and is
subject to change without notice.
This material is provided as is and without any
express or implied warranties, including merchantability, fitness for a particular
purpose and non-infringement.
Mindspeed Technologies shall not be liable for any
special, indirect, incidental or consequential damages as a result of its use.
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