ISM61-2366CH-40.000 datasheet, PDF

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ISM61-2366CH-40.000: DescriptionHCMOS/TTL Output Clock Oscillator,; CategoryPassive components oscillator; File Size99KB，2 Pages; ManufacturerILSI; Websitehttp://www.ilsiamerica.com

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ISM61-2366CH-40.000 Overview

HCMOS/TTL Output Clock Oscillator,

ISM61-2366CH-40.000 Parametric

Parameter Name	Attribute value
Objectid	1293626381
package instruction	SMD, 4 PIN
Reach Compliance Code	compliant
Other features	ENABLE/DISABLE FUNCTION; TR, 7 INCH
Frequency Adjustment - Mechanical	NO
frequency stability	100%
JESD-609 code	e2
Installation features	SURFACE MOUNT
Nominal operating frequency	40 MHz
Maximum operating temperature	70 °C
Minimum operating temperature	-20 °C
Oscillator type	HCMOS/TTL
Output load	10 TTL, 30 pF
physical size	13.4mm x 8.55mm x 4.7mm
Maximum supply voltage	2.835 V
Minimum supply voltage	2.565 V
Nominal supply voltage	2.7 V
surface mount	YES
maximum symmetry	40/60 %
Terminal surface	TIN COPPER/TIN SILVER

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9 mm x 14 mm Plastic Package SMD Oscillator, TTL / HC-MOS

ISM61 Series

Product Features:

Low Jitter, Non-PLL Based Output

CMOS/TTL Compatible Logic Levels

Compatible with Leadfree Processing

Applications:

Fibre Channel

Server & Storage

Sonet /SDH

802.11 / Wifi

T1/E1, T3/E3

System Clock

Frequency

Output Level

HC-MOS

TTL

Duty Cycle

Rise / Fall Time

Output Load

Frequency Stability

Start-up Time

Enable / Disable

Time

Supply Voltage

Current

Operating

Storage

Jitter:

RMS(1sigma)

1 MHz-75 MHz

76 MHz-150 MHz

Max Integrated

1 MHz-75 MHz

76 MHz-150 MHz

Max Total Jitter

1 MHz-75 MHz

76 MHz-150 MHz

250 KHz to 150.000 MHz

‘0’ = 0.1 Vcc Max., ‘1’ = 0.9 Vcc Min.

‘0’ = 0.4 VDC Max., ‘1’ = 2.4 VDC Min.

Specify 50% ±10% or ±5% See Table in Part Number Guide

5 nS Max. @ Vcc = +3.3 VDC, 10 nS Max. @ Vcc = +5 VDC ***

Fo < 50 MHz = 10 TTL, Fo > 50 MHz = 5 LSTTL See Table in Part Number

Guide

See Frequency Stability Table (Includes room temperature tolerance and

stability over operating temperature)

10 mS Max.

100 nS Max. N.C. or

≥

70% Vdd = Enable.

≤

30% Vdd = Disable.

See Input Voltage Table, tolerance ±5 %

70 mA Max. ***

See Operating Temperature Table in Part Number Guide

-55



C to +125



5 pS RMS (1 sigma) Max. accumulated jitter (20K adjacent periods)

3 pS RMS (1 sigma) Max. accumulated jitter (20K adjacent periods)

1.5 pS RMS (1 sigma -12KHz to 20MHz)

1 pS RMS (1 sigma -12KHz to 20MHz)

50 pS p-p (100K adjacent periods)

30 pS p-p (100K adjacent periods)

Part Number Guide

Package

Input

Voltage

5 = 5.0 V

ISM61 -

3 = 3.3 V

7 = 3.0 V

2 = 2.7 V

6 = 2.5 V

1 = 1.8 V*

Sample Part Number:

Operating

Temperature

1 = 0 C to +70 C

6 = -10 C to +70 C

3 = -20 C to +70 C

4 = -30 C to +75 C

2 = -40 C to +85 C

ISM61 - 3251BH - 20.000

Output

1 = 10TTL / 15 pF HC-MOS

6 = 30 pF

5 = 50 pF HC-MOS (<40 MHz)

Symmetry

(Duty Cycle)

5 = 45 / 55 Max.

6 = 40 / 60 Max.

Stability

(in ppm)

**E =

10

**D =

15

**F =

20

**A =

25

B =

50

C =

100

Enable /

Disable

H = Enable

O = N/C

Frequency

- 20.000 MHz

NOTE: A 0.01 µF bypass capacitor is recommended between Vcc (pin 4) and GND (pin 2) to minimize power supply noise.

* Not available at all frequencies. ** Not available for all temperature ranges. *** Frequency, supply, and load related parameters.

ILSI

America

Phone: 775-851-8880 • Fax: 775-851-8882• e-mail: e-mail@ilsiamerica.com • www.ilsiamerica.com

5/22/12_B

Specifications subject to change without notice

Page 1

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