NTR3A085PZ
Advance Information
Power MOSFET
−20 V, −2.7 A, Single P−Channel
SOT−23 Package
Features
•
Leading −20 V Trench for Low R
DS(on)
•
−1.8 V Rated for Low Voltage Gate Drive
•
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Applications
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V
(BR)DSS
R
DS(on)
Max
77 mW @ −4.5 V
I
D
MAX
•
Power Load Switch
MAXIMUM RATINGS
(T
J
= 25°C unless otherwise stated)
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain Cur-
rent (Note 1)
Steady
State
t
≤
10 s
Power Dissipation
(Note 1)
Steady
State
t
≤
10 s
Continuous Drain Cur-
rent (Note 2)
Power Dissipation
(Note 2)
Pulsed Drain Current
Steady
State
T
A
= 25°C
T
A
= 85°C
T
A
= 25°C
t
p
= 10
ms
P
D
I
DM
V
ESD
T
J
,
T
STG
I
S
T
L
I
D
T
A
= 25°C
T
A
= 85°C
T
A
= 25°C
T
A
= 25°C
P
D
Symbol
V
DSS
V
GS
I
D
Value
−20
±8
−2.5
−1.8
−2.7
0.72
0.81
−1.9
−1.4
0.42
−10
1000
−55 to
150
−1.1
260
W
A
V
°C
A
°C
A
W
Unit
V
V
A
−20 V
105 mW @ −2.5 V
160 mW @ −1.8 V
−2.7 A
P−Channel MOSFET
D
3
G
1
S
2
MARKING DIAGRAM &
PIN ASSIGNMENT
Drain
3
TRG MG
G
1
Gate
2
Source
ESD HBM, JESD22−A114 (Note 3)
Operating Junction and Storage Temperature
Source Current (Body Diode)
Lead Temperature for Soldering Purposes
(1/8 in from case for 10 s)
SOT−23
CASE 318
STYLE 21
TRG
M
G
= Specific Device Code
= Date Code*
= Pb−Free Package
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
THERMAL RESISTANCE RATINGS
Parameter
Junction−to−Ambient – Steady State (Note 1)
Junction−to−Ambient – t
≤
10 s (Note 1)
Junction−to−Ambient – Steady State (Note 2)
Symbol
R
qJA
R
qJA
R
qJA
Max
175
155
301
°C/W
NTR3A085PZT1G
SOT−23
(Pb−Free)
3000 / Tape &
Reel
Unit
°C/W
ORDERING INFORMATION
Device
Package
Shipping
†
1. Surface−mounted on FR4 board using 1 in sq. pad size
(Cu area = 727 mm sq., 1 oz).
2. Surface−mounted on FR4 board using minimum pad size
(Cu area = 3.8 mm sq., 1 oz).
3. ESD Rating: HBM Class 1C
This document contains information on a new product. Specifications and information
herein are subject to change without notice.
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2015
1
December, 2015 − Rev. P0
Publication Order Number:
NTR3A085PZ/D
NTR3A085PZ
ELECTRICAL CHARACTERISTICS
(T
J
= 25°C unless otherwise specified)
Parameter
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Drain−to−Source Breakdown Voltage
Temperature Coefficient
Zero Gate Voltage Drain Current
V
(BR)DSS
V
(BR)DSS
/T
J
I
DSS
V
GS
= 0 V, I
D
= −250
mA
I
D
= −250
mA,
ref to 25°C
V
GS
= 0 V,
V
DS
= −20 V
T
J
= 25°C
T
J
= 125°C
−20
22
−1
−100
±10
V
mV/°C
mA
mA
mA
Symbol
Test Condition
Min
Typ
Max
Unit
Gate−to−Source Leakage Current
ON CHARACTERISTICS
(Note 4)
Gate Threshold Voltage
Negative Threshold Temperature
Coefficient
Drain−to−Source On Resistance
I
GSS
V
DS
= 0 V, V
GS
=
±8
V
V
GS(TH)
V
GS(TH)
/T
J
R
DS(on)
V
GS
= V
DS
, I
D
= −250
mA
−0.4
3.0
−1.0
V
mV/°C
V
GS
= −4.5 V
V
GS
= −2.5 V
V
GS
= −1.8 V
V
GS
= −1.5 V
I
D
= −1.6 A
I
D
= −1.3 A
I
D
= −0.9 A
I
D
= −0.3 A
54
67
87
110
11.6
77
105
160
mW
Forward Transconductance
CHARGES AND CAPACITANCES
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
SWITCHING CHARACTERISTICS
(Note 5)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
g
FS
V
DS
= −5 V, I
D
= −2.3 A
S
C
iss
C
oss
C
rss
Q
G(TOT)
Q
G(TH)
Q
GS
Q
GD
V
GS
= −4.5 V, V
DS
= −10 V,
I
D
= −1.6 A
V
GS
= 0 V, f = 1.0 MHz, V
DS
= −10 V
586
81
72
6.9
0.5
0.8
1.6
pF
nC
t
d(on)
t
r
t
d(off)
t
f
V
GS
= −4.5 V, V
DS
= −10 V,
I
D
= −1.6 A, R
G
= 6.0
W
7.0
11
32
23
ns
V
SD
V
GS
= 0 V,
I
S
= −1.6 A
T
J
= 25°C
T
J
= 125°C
−0.8
−0.7
11
−1.2
V
Reverse Recovery Time
Charge Time
Discharge Time
Reverse Recovery Charge
t
RR
t
a
t
b
Q
RR
V
GS
= 0 V, dI
SD
/dt = 100 A/ms,
I
S
= −1.6 A
ns
6.0
5.0
4.0
nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width
≤
300 ms, duty cycle
≤
2%.
5. Switching characteristics are independent of operating junction temperatures.
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2
NTR3A085PZ
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AP
D
SEE VIEW C
3
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
DIM
A
A1
b
c
D
E
e
L
L1
H
E
q
MIN
0.89
0.01
0.37
0.09
2.80
1.20
1.78
0.10
0.35
2.10
0
°
MILLIMETERS
NOM
MAX
1.00
1.11
0.06
0.10
0.44
0.50
0.13
0.18
2.90
3.04
1.30
1.40
1.90
2.04
0.20
0.30
0.54
0.69
2.40
2.64
−−−
10
°
MIN
0.035
0.001
0.015
0.003
0.110
0.047
0.070
0.004
0.014
0.083
0
°
INCHES
NOM
0.040
0.002
0.018
0.005
0.114
0.051
0.075
0.008
0.021
0.094
−−−
MAX
0.044
0.004
0.020
0.007
0.120
0.055
0.081
0.012
0.029
0.104
10
°
E
HE
c
1
2
b
e
q
A
L
A1
L1
VIEW C
0.25
STYLE 21:
PIN 1. GATE
2. SOURCE
3. DRAIN
SOLDERING FOOTPRINT*
0.95
0.037
0.95
0.037
2.0
0.079
0.9
0.035
SCALE 10:1
0.8
0.031
mm
inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and the
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which
the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or
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expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
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