EPA3856-5 datasheet, PDF - EEWORLD Datasheet

EPA3856-5: DescriptionTTL Compatible Active Delay Lines; Categorylogic logic; File Size17KB，1 Pages; ManufacturerPCA Electronics Inc.; Websitehttp://www.pca.com/

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EPA3856-5 Overview

TTL Compatible Active Delay Lines

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	PCA Electronics Inc.
Parts packaging code	DIP
package instruction	DIP,
Contacts	8/4
Reach Compliance Code	compliant
JESD-30 code	R-XDIP-T4
JESD-609 code	e0
Logic integrated circuit type	ACTIVE DELAY LINE
Number of functions	1
Number of taps/steps	1
Number of terminals	4
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	UNSPECIFIED
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
programmable delay line	NO
Certification status	Not Qualified
Maximum seat height	6.35 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	2.7 V
Nominal supply voltage (Vsup)	3 V
surface mount	NO
Temperature level	COMMERCIAL
Terminal surface	TIN LEAD
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
Total delay nominal (td)	5 ns
width	7.62 mm
Base Number Matches	1

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