SDF230JAAXGD1N datasheet, PDF - EEWORLD Datasheet

SDF230JAAXGD1N: DescriptionPower Field-Effect Transistor, 9A I(D), 200V, 0.415ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET,; CategoryDiscrete semiconductor The transistor; File Size157KB，1 Pages; ManufacturerSolitron Devices Inc.

Download Datasheet Parametric View All

SDF230JAAXGD1N Overview

Power Field-Effect Transistor, 9A I(D), 200V, 0.415ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET,

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
package instruction	FLANGE MOUNT, R-MSFM-P3
Reach Compliance Code	unknown
ECCN code	EAR99
Configuration	SINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage	200 V
Maximum drain current (Abs) (ID)	9 A
Maximum drain current (ID)	9 A
Maximum drain-source on-resistance	0.415 Ω
FET technology	METAL-OXIDE SEMICONDUCTOR
JESD-30 code	R-MSFM-P3
Number of components	1
Number of terminals	3
Operating mode	ENHANCEMENT MODE
Maximum operating temperature	150 °C
Package body material	METAL
Package shape	RECTANGULAR
Package form	FLANGE MOUNT
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Polarity/channel type	N-CHANNEL
Maximum power consumption environment	75 W
Maximum power dissipation(Abs)	75 W
Maximum pulsed drain current (IDM)	36 A
Certification status	Not Qualified
surface mount	NO
Terminal form	PIN/PEG
Terminal location	SINGLE
Maximum time at peak reflow temperature	NOT SPECIFIED
Transistor component materials	SILICON
Maximum off time (toff)	90 ns
Maximum opening time (tons)	80 ns

485 Communication Problems: [color=#666666][font=Tahoma, Verdana, Arial,]I would like to ask an expert, does the common ground or non-common ground (isolation) of the two sides of 485 communication affect the communication dista...; chenbingjy stm32/stm8

TDC - Time to Digital Converter: When using the delay chain in FPGA to implement tdc, when latching the output data of the delay chain, the input data change near the clock edge violates the setup and hold time of the trigger, causin...; FPGA菜鸡 EE_FPGA Learning Park

How to locate the pins of LCD display?: [color=#222222][font="] Yesterday a customer asked me that they had a display screen that was reflective and did not require a backlight. As a result, there was no way to unify the pin installation po...; 晶拓 Integrated technical exchanges

Problems with the amplifier analog signal output circuit: [Ask if you don't understand] Figures 1 and 2 are both recommended application diagrams for TPA3221. Figure 1 is in the application note, and Figure 2 is a typical application in the datasheet. [1] In...; shaorc Analog electronics

TI bidirectional DC-DC converter solution: 200V DC to 400V DC HV bus voltage range9V DC to 13.5V DC LV bus voltage range Bidirectional DC-DC converters are used in applications where bidirectional power flow may be required. In hybrid electric...; qwqwqw2088 Analogue and Mixed Signal

Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

Popular Components