Ordering number : ENA0145
LC87F6AC8A
CMOS LSI
8-bit Withstand Voltage
Microcontroller
128K-byte Flash ROM / 4096-byte RAM / 100pin
http://onsemi.com
Overview
The LC87F6AC8A is an 8-bit microcontroller that, centered around a CPU running at a minimum bus cycle time of 83.3
ns, integrates on a single chip a number of hardware features such as 128K-byte flash ROM (onboard programmable),
4096-byte RAM, on-chip debugging function, a vacuum fluorescent display (VFD) automatic display controller/driver,
a 16-bit timer/counter (may be divided into 8-bit timers), a 16-bit timer/counter (may be divided into 8-bit timer/counter
or 8-bit PWMs), four 8-bit timers with a prescaler, a 16-bit timer with a prescaler (may be divided into 8-bit timers), a
base timer used as a time-of-day clock, a high-speed clock counter, a system clock frequency divider, two synchronous
SIO* with automatic transfer capability, an asynchronous/synchronous SIO, two channels of 12-bit PWM modules*, an
8-bit 15-channel AD converter, a small signal detector, and a 27-source 10-vector interrupt feature*.
(* can be supported with the LC876A00 or LC876B00 series by selecting “User Options.”)
Features
Flash ROM
•
Capable of onboard programming with a single 5V power supply
•
On-chip debugging function
•
Block erasable in 128-byte units
•
131072 × 8 bits
RAM
•
4096 × 9 bits
Minimum bus cycle time
•
83.3s (at 12 MHz)
VDD = 2.8 to 5.5[V]
•
250ns (at 4 MHz)
VDD = 2.5 to 5.5[V]
Note: The bus cycle time refers to the ROM read speed.
Minimum instruction cycle time (Tcyc)
•
249.9ns (at 12 MHz) VDD = 2.8 to 5.5[V]
•
750ns (at 4 MHz)
VDD = 2.5 to 5.5[V]
Package form
•
QIP100E (lead/Halogen free type)
QIP100E(14X20)
ORDERING INFORMATION
See detailed ordering and shipping information on page 34 of this data sheet.
Semiconductor Components Industries, LLC, 2014
April, 2014
Ver. 1.70a
41714HKPC 20140327-S00001 No.A0145-1/34
LC87F6AC8A
Ports
•
Normal withstand voltage I/O ports
User Option Selection
For LC876A00 series
For LC876B00 series
Ports Whose Input/Output Can Be Specified in 1-bit Units
32 (P1n, P70 to P73, P8n, P30 to P37, PAn)
32 (P1n, P70 to P73, P8n, P32 to P35, SI2Pn, PAn)
Port that can also be used for oscillation
•
12V max. withstand voltage I/O ports
Ports whose input/output can be specified in 4-bit units
(in 1- bit units when configured for N-channel open drain output)
•
Normal withstand voltage input-only port (also used for oscillation)
•
Vacuum fluorescent display (VFD) driver ports
Large current outputs for digits
Large current outputs for digits/segments
Outputs for digits/segments
Outputs for segments
Multiplexed pin function
I/O ports
Input ports
•
Dedicated oscillator pins
•
Reset pin
•
Power pins
•
Dedicated vacuum fluorescent display driver power pin
1 (XT2)
8 (P0n)
1 (XT1)
9 (S0/T0 to S8/T8)
7 (S9/T9 to S15/T15)
8 (S16 to S23)
24 (S24 to S47)
8 (PFn)
24 (PCn, PDn, PEn)
2 (CF1, CF2)
____
1 ( RES)
6 (VSS1 to VSS2, VDD1 to VDD4)
1 (VP)
VFD automatic display controller
<1> Programmable segment/digit output patterns
Waveform output can be switched between segment and digit output. (number of pins available for digit waveform
output: 9 to 24)
Capable of driving large current VFDs in parallel
<2> Provides 16-step dimmer function
Small signal detection (microphone signals, etc.)
<1> Counts pulses with amplitudes greater than a preset level
<2> 2-bit counter
Timers
•
Timer 0: 16-bit timer/counter with two capture registers
Mode 0: 8-bit timer with an 8-bit programmable prescaler (with two 8-bit capture registers) × 2 channels
Mode 1: 8-bit timer with an 8-bit programmable prescaler (with two 8-bit capture registers) + 8-bit counter (with
two 8-bit capture registers)
Mode 2: 16-bit timer with an 8-bit programmable prescaler (with two 16-bit capture registers)
Mode 3: 16-bit counter (with two 16-bit capture registers)
•
Timer 1: 16-bit timer/counter with PWM/toggle output capability
Mode 0: 8-bit timer with an 8-bit prescaler (with toggle output) + 8-bit timer/counter with an 8-bit prescaler (with
toggle output)
Mode 1: 8-bit PWM with an 8-bit prescaler × 2 channels
Mode 2: 16-bit timer/counter with an 8-bit prescaler (with toggle output) (toggle output also possible from the
low-order 8 bits)
Mode 3: 16-bit timer with an 8-bit prescaler (with toggle output) (The low-order 8 bits can be used as PWM.)
No.A0145-2/34
LC87F6AC8A
•
Timer 4: 8-bit timer with a 6-bit prescaler
•
Timer 5: 8-bit timer with a 6-bit prescaler
•
Timer 6: 8-bit timer with a 6-bit prescaler (with toggle output)
•
Timer 7: 8-bit timer with a 6-bit prescaler (with toggle output)
•
Timer 8: 16-bit timer
Mode 0: 8-bit timer with an 8-bit prescaler × 2 channels
Mode 1: 16-bit timer with an 8-bit prescaler
*Timer 8 is not supported by emulator. An on-chip debugger must be used to develop software for timer 8.
•
Base timer
<1> The clock can be selected from among the subclock (32.768kHz crystal oscillator), system clock, and timer 0
prescaler output.
<2> Interrupts are programmable in 5 different time schemes.
High-speed clock counter
<1> Capable of counting clocks with a maximum clock rate of 20MHz (when 10MHz main clock is used)
<2> Real-time output
Serial interface
•
SIO0: 8-bit synchronous serial interface
<1> LSB first/MSB first is selectable.
<2> Built-in 8-bit baudrate generator (maximum transfer clock cycle: 4/3 tCYC)
<3> Automatic continuous data communication (1 to 256 bits, selectable in 1-bit units) (suspension and resumption
of data transfer controllable in byte units)
•
SIO1: 8-bit asynchronous/synchronous serial interface
Mode 0: Synchronous 8-bit serial I/O (2- or 3-wire configuration, 2 to 512 tCYC transfer clock)
Mode 1: Asynchronous serial I/O (half-duplex, 8 data bits, 1 stop bit, 8 to 2048 tCYC baudrate)
Mode 2: Bus mode 1 (start bit, 8 data bits, 2 to 512 tCYC transfer clock)
Mode 3: Bus mode 2 (start detect, 8 data bits, stop detect)
•
SIO2: 8-bit synchronous serial interface *Available in LC876B00 series compatible configuration
<1> LSB first
<2> Built-in 8-bit baudrate generator (maximum transfer clock cycle: 4/3 tCYC)
<3> Automatic continuous data communication (1 to 32 bytes, selectable in byte units)
ADC: 8 bits × 15 channels
•
Reference voltage can be selected from the VDD1 or VDD2 pin.
PWM *Available in LC876A00 series compatible configuration
•
Multifrequency 12-bit PWM × 2 channels
Remote control receiver circuit (multiplexed with the P73/INT3/T0IN pin)
<1> Noise rejection function (noise filter time constant selectable from 1/32/128 tCYC)
Watchdog timer
<1>External RC watchdog timer
<2>Interrupt and reset signals selectable
No.A0145-3/34
LC87F6AC8A
Interrupts: 27 sources, 10 vector addresses (LC876A00 compatible)
26 sources, 10 vector addresses (LC876B00 compatible)
<1> Provides three levels (low (L), high (H), and highest (X)) of multiplex interrupt control. Any interrupt request of
the level equal to or lower than the current interrupt is not accepted.
<2> When interrupt requests to two or more vector addresses occur at the same time, the interrupt of the highest level
takes precedence over the other interrupts. For interrupts of the same level, the interrupt into the smallest vector
address is given priority.
* LC876A00 series compatible configuration
No.
1
2
3
4
5
6
7
8
9
10
Vector Address
00003H
0000BH
00013H
0001BH
00023H
0002BH
00033H
0003BH
00043H
0004BH
Level
X or L
X or L
H or L
H or L
H or L
H or L
H or L
H or L
H or L
H or L
INT0
INT1
INT2 / T0L / INT4
INT3 / base timer / INT5
T0H / INT6
T1L / T1H / INT7
SIO0 / T8L / T8H
SIO1
ADC / MIC / T6 / T7 / PWM4 / PWM5
VFD / port 0 / T4 / T5
Interrupt Source
* LC876B00 series compatible configuration
No.
1
2
3
4
5
6
7
8
9
10
Vector Address
00003H
0000BH
00013H
0001BH
00023H
0002BH
00033H
0003BH
00043H
0004BH
Level
X or L
X or L
H or L
H or L
H or L
H or L
H or L
H or L
H or L
H or L
INT0
INT1
INT2 / T0L / INT4
INT3 / base timer / INT5
T0H / INT6
T1L / T1H / INT7
SIO0 / T8L / T8H
SIO1 / SIO2
ADC / MIC / T6 / T7
VFD / port 0 / T4 / T5
Interrupt Source
• Priority levels X > H > L
• When interrupts of the same level occur at the same time, the interrupt with the smallest vector address is given
priority.
Subroutine stack levels: Up to 2048 levels (The stack is allocated in RAM.)
High-speed multiplication division instructions
•
16 bits × 8 bits (5 tCYC execution time)
•
24 bits × 16 bits (12 tCYC execution time)
•
16 bits ÷ 8 bits (8 tCYC execution time)
•
24 bits ÷ 16 bits (12 tCYC execution time)
Oscillator circuits
•
RC oscillator circuit (internal)
•
CF oscillator circuit
•
Crystal oscillator circuit
•
Multifrequency oscillator circuit (internal)
: For system clock
: For system clock with internal Rf
: For low-speed system clock with external Rd and Rf
: For system clock
No.A0145-4/34
LC87F6AC8A
System clock divider function
•
Capable of run
The minimum instruction cycle time can be selected from among 300ns, 600ns, 1.2μs, 2.4μs, 4.8μs, 9.6μs, 19.2μs,
38.4μs, and 76.8μs (at a main clock rate of 10MHz).ning on low current.
Clock output function
<1> Capable of generating 1/1, 1/2, 1/4, 1/8, 1/16, 1/32, or 1/64 of the source clock that is selected as the system
clock.
<2> Capable of generating the source clock for the subclock.
Standby function
•
HALT mode: Halts instruction execution while allowing the peripheral circuits to continue operation. (The VFD
display function and part of the serial transfer functions are disabled.)
<1> Oscillation is not halted automatically.
<2> Released by system reset or occurrence of an interrupt.
•
HOLD mode: Suspends instruction execution and operation of the peripheral circuits.
<1> The CF oscillator, RC oscillator, crystal oscillator, and multifrequency RC oscillator automatically stop
operation.
<2> There are three ways of releasing HOLD mode:
1) Setting the reset pin to a low level
2) Setting at least one of the INT0, INT1, INT2, INT4, and INT5 pins to the specified level
3) Establishing an interrupt source at port 0
•
X’tal HOLD mode: Suspends instruction execution and the operation of the peripheral circuits except the base timer.
<1> The CF oscillator, RC oscillator, and multifrequency RC oscillator automatically stop operation.
<2> The crystal oscillator retains the state when X’tal HOLD mode is entered.
<3> There are four ways of releasing X’tal HOLD mode:
1) Setting the reset pin to a low level
2) Setting at least one of the INT0, INT1, INT2, INT4, and INT5 pins to the specified level
3) Establishing an interrupt source at port 0
4) Establishing an interrupt source in the base timer circuit
On-chip debugger function
•
Supports software debugging with the microcontroller mounted on the target device
Development tools
•
Evaluation chip: LC87EV690
•
Flash ROM programming board: W87FQ100
User Option Selection
LC876A00 series compatible
LC876B00 series compatible
Emulator
EVA62S + ECB876600D + SUB876A00 + POD100QFP
ICE-B877300 + SUB876A00 + POD100QFP
EVA62S + ECB876600D + SUB876B00 + POD100QFP
ICE-B877300 + SUB876B00 + POD100QFP
Same package and pin assignment as mask ROM version
•
The LC87F6AC8A allows the user to specify the optional functions of the LC876A00 or LC876B00 series
microcontrollers in the form of flash ROM data (note, however, that pins S32 to S47 are not provided with an internal
pull-down resistor). This makes it possible to conduct sample tests using the production model circuit board.
•
When a program that is designed for the mask ROM version is applied to the LC87F6AC8A, the size of ROM and
RAM that can be used is the same as that of the mask ROM version of the microcontrtoller.
No.A0145-5/34
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