EEWORLDEEWORLDEEWORLD

Part Number

Search
 PDF

NMC-H1210NP0102J250TRPLPF

Description
CAP,CERAMIC,1NF,250VDC,5% -TOL,5% +TOL,NP0 TC CODE,-30,30PPM TC,1210 CASE
CategoryPassive components    capacitor   
File Size63KB,5 Pages
ManufacturerNIC Components Corp
Environmental Compliance  
Download Datasheet Parametric View All

NMC-H1210NP0102J250TRPLPF Overview

CAP,CERAMIC,1NF,250VDC,5% -TOL,5% +TOL,NP0 TC CODE,-30,30PPM TC,1210 CASE

NMC-H1210NP0102J250TRPLPF Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
Reach Compliance Codecompliant
capacitance0.001 µF
Capacitor typeCERAMIC CAPACITOR
dielectric materialsCERAMIC
high2.6 mm
JESD-609 codee3
length3.2 mm
Manufacturer's serial numberNMC-H
multi-layerYes
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package formSMT
method of packingTape, Embossed
Rated (DC) voltage (URdc)250 V
seriesNMC-H
size code1210
Temperature characteristic codeNP0
Temperature Coefficient-/+30ppm/Cel ppm/°C
Terminal surfaceMATTE TIN OVER NICKEL
width2.5 mm
The digital signal and noise are not much different (amplitude and frequency). Can software algorithms be used to extract the signal and filter out the noise?
The digital signal and noise are not much different (amplitude and frequency). Can software algorithms be used to extract the signal and filter out the noise?...
成风破浪 Programming Basics
Recruiting BMS system test engineers Annual salary: 200,000-350,000 | Experience: more than 3 years | Work location: Baoding, Wuxi
Job Responsibilities: 1. Develop BMS software and system test plans;2. Build battery simulation equipment and HIL test environment, implement test tasks, and complete test reports;3. Develop PACK-leve...
ViviWong Recruitment
The pros and cons of chip design outsourcing
Semiconductor manufacturing is traditionally divided into four processes: design, manufacturing, packaging, and testing. From the perspective of technical content and cost, the design and manufacturin...
settleinsh FPGA/CPLD
Digital Communication FPGA Development and Design Platform.pdf
Digital Communication FPGA Development and Design Platform.pdf...
zxopenljx EE_FPGA Learning Park
ADI reference material sharing
ADI high-speed design guide, how to read data sheets, key points for using passive components, and other information sharing ADI reference circuits are tested and tested to help accelerate design, sim...
勤奋 ADI Reference Circuit
EEWORLD University ---- Embedded C Language
Embedded C language : https://training.eeworld.com.cn/course/27333Embedded C language introduction and advanced...
桂花蒸 MCU

Technical ResourceMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号