PBRN113E series
NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 1 kΩ
Rev. 01 — 1 March 2007
Product data sheet
1. Product profile
1.1 General description
800 mA NPN low V
CEsat
Breakthrough In Small Signal (BISS) Resistor-Equipped
Transistors (RET) family in small plastic packages.
Table 1.
Product overview
Package
NXP
PBRN113EK
PBRN113ES
[1]
PBRN113ET
[1]
Type number
JEITA
SC-59A
SC-43A
-
JEDEC
TO-236
TO-92
TO-236AB
SOT346
SOT54
SOT23
Also available in SOT54A and SOT54 variant packages (see
Section 2).
1.2 Features
I
800 mA output current capability
I
High current gain h
FE
I
Built-in bias resistors
I
Simplifies circuit design
I
Low collector-emitter saturation voltage
V
CEsat
I
Reduces component count
I
Reduces pick and place costs
I
±10
% resistor ratio tolerance
1.3 Applications
I
Digital application in automotive and
industrial segments
I
Medium current peripheral driver
I
Switching loads
1.4 Quick reference data
Table 2.
Symbol
V
CEO
I
O
Quick reference data
Parameter
collector-emitter voltage
output current
PBRN113EK, PBRN113ET
PBRN113ES
Conditions
open base
[1]
Min
-
-
-
Typ
-
-
-
Max
40
600
800
Unit
V
mA
mA
NXP Semiconductors
PBRN113E series
NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 1 kΩ
Quick reference data
…continued
Parameter
repetitive peak output current
PBRN113EK, PBRN113ET t
p
≤
1 ms;
δ ≤
0.33
-
0.7
0.9
-
1
1
800
1.3
1.1
mA
kΩ
bias resistor 1 (input)
bias resistor ratio
Conditions
Min
Typ
Max
Unit
Table 2.
Symbol
I
ORM
R1
R2/R1
[1]
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
2. Pinning information
Table 3.
Pin
SOT54
1
2
3
input (base)
output (collector)
GND (emitter)
R1
Pinning
Description
Simplified outline
Symbol
2
1
2
3
001aab347
006aaa145
1
R2
3
SOT54A
1
2
3
input (base)
output (collector)
GND (emitter)
R1
2
1
2
3
001aab348
006aaa145
1
R2
3
SOT54 variant
1
2
3
input (base)
output (collector)
GND (emitter)
R1
2
1
2
3
001aab447
006aaa145
1
R2
3
SOT23; SOT346
1
2
3
input (base)
GND (emitter)
output (collector)
1
2
006aaa144
sym007
3
R1
3
1
R2
2
PBRN113E_SER_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 1 March 2007
2 of 17
NXP Semiconductors
PBRN113E series
NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 1 kΩ
3. Ordering information
Table 4.
Ordering information
Package
Name
PBRN113EK
PBRN113ES
[1]
PBRN113ET
[1]
Type number
Description
plastic surface-mounted package; 3 leads
Version
SOT346
SC-59A
SC-43A
-
plastic single-ended leaded (through hole) package; SOT54
3 leads
plastic surface-mounted package; 3 leads
SOT23
Also available in SOT54A and SOT54 variant packages (see
Section 2
and
Section 9).
4. Marking
Table 5.
Marking codes
Marking code
[1]
G1
N113ES
*7G
Type number
PBRN113EK
PBRN113ES
PBRN113ET
[1]
* = -: made in Hong Kong
* = p: made in Hong Kong
* = t: made in Malaysia
* = W: made in China
5. Limiting values
Table 6.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
CBO
V
CEO
V
EBO
V
I
Parameter
collector-base voltage
collector-emitter voltage
emitter-base voltage
input voltage
positive
negative
I
O
output current
PBRN113EK, PBRN113ET
PBRN113ES
I
ORM
repetitive peak output current
PBRN113EK, PBRN113ET t
p
≤
1 ms;
δ ≤
0.33
-
800
mA
[1]
[2][3]
[1]
Conditions
open emitter
open base
open collector
Min
-
-
-
-
-
-
-
-
Max
40
40
10
+10
−10
600
700
800
Unit
V
V
V
V
V
mA
mA
mA
PBRN113E_SER_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 1 March 2007
3 of 17
NXP Semiconductors
PBRN113E series
NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 1 kΩ
Table 6.
Limiting values
…continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
P
tot
Parameter
total power dissipation
PBRN113EK, PBRN113ET
Conditions
T
amb
≤
25
°C
[1]
[2]
[3]
Min
-
-
-
-
-
−65
−65
Max
250
370
570
700
150
+150
+150
Unit
mW
mW
mW
mW
°C
°C
°C
PBRN113ES
T
j
T
amb
T
stg
[1]
[2]
[3]
[1]
junction temperature
ambient temperature
storage temperature
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm
2
.
Device mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
600
(1)
006aaa998
P
tot
(mW)
400
(2)
(3)
200
0
−75
−25
25
75
125
175
T
amb
(°C)
(1) Ceramic PCB, Al
2
O
3
, standard footprint
(2) FR4 PCB, mounting pad for collector 1 cm
2
(3) FR4 PCB, standard footprint
Fig 1. Power derating curves for SOT23 (TO-236AB) and SOT346 (SC-59A/TO-236)
PBRN113E_SER_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 1 March 2007
4 of 17
NXP Semiconductors
PBRN113E series
NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 1 kΩ
800
P
tot
(mW)
600
006aaa999
400
200
0
−75
−25
25
75
125
175
T
amb
(°C)
FR4 PCB, standard footprint
Fig 2. Power derating curve for SOT54 (SC-43A/TO-92)
6. Thermal characteristics
Table 7.
Symbol
R
th(j-a)
Thermal characteristics
Parameter
Conditions
Min
Typ
Max
Unit
thermal resistance from junction in free air
to ambient
PBRN113EK, PBRN113ET
[1]
[2]
[3]
-
-
-
-
-
-
-
-
500
338
219
179
K/W
K/W
K/W
K/W
PBRN113ES
R
th(j-sp)
thermal resistance from junction
to solder point
PBRN113EK, PBRN113ET
[1]
[2]
[3]
[1]
-
-
105
K/W
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm
2
.
Device mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
PBRN113E_SER_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 1 March 2007
5 of 17
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