MM54HC75J datasheet, PDF - EEWORLD Datasheet

MM54HC75J: Description4-Bit Bistable Latch with Q and Q Output; Categorylogic logic; File Size139KB，4 Pages; ManufacturerNational Semiconductor（TI ）; Websitehttp://www.ti.com

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MM54HC75J Overview

4-Bit Bistable Latch with Q and Q Output

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	National Semiconductor（TI ）
package instruction	DIP-16
Reach Compliance Code	unknow
series	HC/UH
JESD-30 code	R-GDIP-T16
JESD-609 code	e0
length	19.43 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	D LATCH
Number of digits	2
Number of functions	2
Number of terminals	16
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Output polarity	COMPLEMENTARY
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DIP
Encapsulate equivalent code	DIP16,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	2/6 V
propagation delay (tpd)	44 ns
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum supply voltage (Vsup)	6 V
Minimum supply voltage (Vsup)	2 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
Trigger type	HIGH LEVEL
width	7.62 mm

	MM54HC75J	MM54HC75	MM54HC75N	MM74HC75	MM74HC75J
Description	4-Bit Bistable Latch with Q and Q Output	4-Bit Bistable Latch with Q and Q Output	4-Bit Bistable Latch with Q and Q Output	4-Bit Bistable Latch with Q and Q Output	4-Bit Bistable Latch with Q and Q Output

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