Transient Voltage Suppressors for ESD Protection
The ESD05V32D-LCD is low capacitance TVS arrays
designed to protect high speed data interfaces. This series
has been specifically designed to protect sensitive
components which are connected to high-speed data and
transmission lines from over-voltage caused by ESD
(electrostatic discharge), CDE (Cable Discharge Events),
and EFT (electrical fast transients).
250 Watts Peak Pulse Power per Line (tp=8/20µs)
Protects One Bidirectional I/O line
Low clamping voltage
Working voltages : 5.0V
Low leakage current
IEC61000-4-2(ESD):±30kV (air discharge)
±30kV
(contact discharge);
IEC61000-4-4 (EFT) 40A (5/50ηs)
Ethernet - 10/100/1000 Base T
Cellular Phones
I 2 C Bus Protection
Parallel & Serial Port Protection
Personal Digital Assistant (PDA)
Microcontroller Input Protection
ISDN S/T Interface
WAN/LAN Equipment
JEDEC SOD-323 Package
Molding Compound Flammability Rating : UL 94V-O
Weight 5.0 Millgrams (Approximate)
Quantity Per Reel : 3,000pcs
Reel Size : 7 inch
Lead Finish : Lead Free
Device Marking: CA5
Symbol
Ppp
T
J
T
STG
T
L
Parameter
Peak Pulse Power (tp=8/20µs waveform)
Operating Junction Temperature Range
Storage Temperature Range
Soldering Temperature, T max = 10s
Value
250
-55 to +150
-55 to +150
260
Units
Watts
ºC
ºC
ºC
Revision December 18, 2013
1/3
@ UN Semiconductor Co., Ltd. 2013
Specifications are subject to change without notice.
Please refer to www.unsemi.com.tw for current information.
Transient Voltage Suppressors for ESD Protection
Characteristics
Reverse Working
Voltage
Reverse Breakdown
Voltage
Reverse Leakage
Current
Junction capacitance
Symbol
V
RWM
Test Conditions
--
Min.
--
Typ.
--
Max.
5.0
Unit
V
V
BR
I
R
C
J
I
T
=1mA
6.0
--
--
--
--
1
--
0.05
--
V
μA
pF
V
RWM
=5.0V;T=25°C
I/O To I/O;V
R
=0V,f=1MHz;
I
PP
=1A,T
P
=8/20μS;
Positive Clamping
Voltage
V
C
--
--
--
--
9.8
21
I
PP
=12A,T
P
=8/20μS;
V
Fig1. 8/20μs Pulse Waveform
Fig2. ESD Pulse Waveform (according to IEC 61000-4-2)
100
90
%
%
Percent of Peak Pulse
Current %
10
%
=
tr
30n
0.7~1ns
60n
s
s
Time
(ns)
Fig3. ESD Clamping Volatge & Peak Pulse Curerent
Fig4. Pulse Waveform
Revision December 18, 2013
2/3
@ UN Semiconductor Co., Ltd. 2013
Specifications are subject to change without notice.
Please refer to www.unsemi.com.tw for current information.
Transient Voltage Suppressors for ESD Protection
* SOLDERING FOOTPRINT
Revision December 18, 2013
3/3
@ UN Semiconductor Co., Ltd. 2013
Specifications are subject to change without notice.
Please refer to www.unsemi.com.tw for current information.