HR7P192

Parameters

• Kernel

- High-performance Harvard RISC CPU core

- 79 streamlined instructions

- The instruction cycle is 2 system clock cycles

- Supports 8×8 hardware multiplier and 16÷8 hardware divider

- Support interrupt processing, interrupt priority and vector table

• Storage resources

- 64K Words OTP program memory, 64-level program stack, supports program self-programming

- 4K Bytes SRAM data memory

- Program memory supports PC direct addressing, relative addressing and table read operations

- Data memory supports direct addressing, GPR special addressing and indirect addressing

• I/O ports

- Supports up to 71 IO ports

- 8 external port interrupts (PINT0-PINT7)

- 1 8-input external key interrupt KINT (KIN0~KIN7 are input terminals)

• Reset and clock

- Built-in power-on reset circuit POR

- Built-in power-off reset circuit BOR

- Support hardware watchdog timer

- Support 32.768KHz crystal oscillator clock source (configurable as system clock source)

- Supports internal low-frequency 32KHz RC oscillator clock source (used as WDT clock source and can be configured as system clock source)

- Support PLL frequency multiplication, up to 13MHz (for system clock)

• Peripherals

- One 8-bit timer T8N

- Timer mode [clock source is system clock divided by 2 (Fosc/2)]

- Counter mode [clock source is T8NCKI input)

　　Configurable prescaler

　　Support interrupt generation

- Two 8-bit PWM time base timers T8P1/T8P2

- Timer mode [clock source is system clock divided by 2 (Fosc/2)]

- Configurable prescaler and postscaler

　　Support single-side and double-side (PWM) modes

　　Support interrupt generation

- Two 16-bit gated timers T16G1/T16G2

- Timer mode [clock source is system clock divided by 2 (Fosc/2)]

- Counter mode [clock source is T16G×CKI input)

　　Support comparator mode

　　Support capture mode

　　Support single-side and double-side (PWM) modes

　　Support external gating enable

　　Support interrupt generation

- Analog-to-digital converter (ADC)

- 10-digit digital conversion accuracy

　　8-channel analog input

　　Support interrupt generation

- Two high-speed asynchronous receivers and transmitters UART1/UART2/UART1/UART3/UART4

- Asynchronous full-duplex transmission and reception

　　Transmission baud rate configurable

　　Support 8-bit and 8-bit data formats

　　Support interrupt generation

　　Supports sending PWM mode

- One I2C bus master controller I2CM

- Support standard I2C bus protocol, maximum transmission rate 400Kbit/s

- Single master control mode

　　The hardware automatically generates an I2C communication signal interrupt flag

- Support 7-bit addressing or 10-bit addressing

　　The data line (SDA) uses an open-drain design

－ LCD display driver module LCDC

- Access via I2C interface

- Support 4/6/8COM×25SEG pixels

- Support grayscale adjustment function

- Support display flashing function, the flashing frequency is adjustable

• Programming and debugging interface

- Support In-Circuit Programming (ISP) interface

- Supports In-Circuit Debug (ICD) interface

- Programming code encryption protection

• Design and craftsmanship

- Low power consumption, high speed FLASH CMOS process

- LQFP44 package (supports 37 I/O ports)

• Working conditions

- Operating voltage range: 2.5V ~ 5.5V

- Operating temperature range: -40℃~85℃

Application

Smart home appliances, industrial control, automotive electronics, medical equipment and other fields