IS61LP6436A-166TQLI datasheet, PDF

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IS61LP6436A-166TQLI: DescriptionCache SRAM, 64KX36, 3.5ns, CMOS, PQFP100, LEAD FREE, TQFP-100; Categorystorage storage; File Size106KB，17 Pages; ManufacturerIntegrated Silicon Solution ( ISSI ); Environmental Compliance

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IS61LP6436A-166TQLI Overview

Cache SRAM, 64KX36, 3.5ns, CMOS, PQFP100, LEAD FREE, TQFP-100

IS61LP6436A-166TQLI Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Integrated Silicon Solution ( ISSI )
Parts packaging code	QFP
package instruction	LQFP, QFP100,.63X.87
Contacts	100
Reach Compliance Code	compli
ECCN code	3A991.B.2.A
Maximum access time	3.5 ns
Other features	PIPELINED ARCHITECTURE
Maximum clock frequency (fCLK)	166 MHz
I/O type	COMMON
JESD-30 code	R-PQFP-G100
JESD-609 code	e3
length	20 mm
memory density	2359296 bi
Memory IC Type	CACHE SRAM
memory width	36
Humidity sensitivity level	3
Number of functions	1
Number of terminals	100
word count	65536 words
character code	64000
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	64KX36
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	LQFP
Encapsulate equivalent code	QFP100,.63X.87
Package shape	RECTANGULAR
Package form	FLATPACK, LOW PROFILE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	260
power supply	2.5/3.3,3.3 V
Certification status	Not Qualified
Maximum seat height	1.6 mm
Maximum standby current	0.04 A
Minimum standby current	3.14 V
Maximum slew rate	0.2 mA
Maximum supply voltage (Vsup)	3.465 V
Minimum supply voltage (Vsup)	3.135 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Matte Tin (Sn) - annealed
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	40
width	14 mm

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IS61LP6432A

IS61LP6436A

64K x 32, 64K x 36 SYNCHRONOUS

PIPELINED STATIC RAM

FEATURES

• Internal self-timed write cycle

• Individual Byte Write Control and Global Write

• Clock controlled, registered address, data and

control

• Pentium™ or linear burst sequence control using

MODE input

• Three chip enables for simple depth expansion

and address pipelining

• Common data inputs and data outputs

• JEDEC 100-Pin TQFP package

• Power-down snooze mode

• Power Supply:

+3.3V V

+3.3V or 2.5V V

DDQ

(I/O)

• Lead-free available

ISSI

SEPTEMBER 2005

DESCRIPTION

The

ISSI

IS61LP6432A/36A is a high-speed synchronous

static RAM designed to provide a burstable, high-perfor-

mance memory for high speed networking and communica-

tion applications. The IS61LP6432A is organized as 64K

words by 32 bits and the IS61LP6436A is organized as 64K

words by 36 bits. Fabricated with

ISSI

's advanced CMOS

technology, the device integrates a 2-bit burst counter, high-

speed SRAM core, and high-drive capability outputs into a

single monolithic circuit. All synchronous inputs pass

through registers controlled by a positive-edge-triggered

single clock input.

Write cycles are internally self-timed and are initiated by

the rising edge of the clock input. Write cycles can be from

one to four bytes wide as controlled by the write control

inputs.

Separate byte enables allow individual bytes to be written.

BW1

controls DQa,

BW2

controls DQb,

BW3

controls

DQc,

BW4

controls DQd, conditioned by

BWE

being

LOW. A LOW on

input would cause all bytes to be

written.

Bursts can be initiated with either

ADSP

(Address Status

Processor) or

ADSC

(Address Status Cache Controller)

input pins. Subsequent burst addresses can be generated

internally and controlled by the

ADV

(burst address

advance) input pin.

The mode pin is used to select the burst sequence order,

Linear burst is achieved when this pin is tied LOW.

Interleave burst is achieved when this pin is tied HIGH or

left floating.

FAST ACCESS TIME

Symbol

Parameter

Clock Access Time

Cycle Time

Frequency

-166

3.5

166

-133

7.5

133

Units

MHz

Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability

arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any

published information and before placing orders for products.

Integrated Silicon Solution, Inc. — 1-800-379-4774

Rev. B

09/02/05

IS61LP6436A-166TQLI Related Products

	IS61LP6436A-166TQLI	IS61LP6436A-133TQI	IS61LP6436A-166TQ
Description	Cache SRAM, 64KX36, 3.5ns, CMOS, PQFP100, LEAD FREE, TQFP-100	64KX36 CACHE SRAM, 4ns, PQFP100, TQFP-100	64KX36 CACHE SRAM, 3.5ns, PQFP100, TQFP-100
Is it lead-free?	Lead free	Contains lead	Contains lead
Is it Rohs certified?	conform to	incompatible	incompatible
Maker	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )
Parts packaging code	QFP	QFP	QFP
package instruction	LQFP, QFP100,.63X.87	TQFP-100	TQFP-100
Contacts	100	100	100
Reach Compliance Code	compli	compliant	compli
ECCN code	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A
Maximum access time	3.5 ns	4 ns	3.5 ns
Other features	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE
Maximum clock frequency (fCLK)	166 MHz	133 MHz	166 MHz
I/O type	COMMON	COMMON	COMMON
JESD-30 code	R-PQFP-G100	R-PQFP-G100	R-PQFP-G100
JESD-609 code	e3	e0	e0
length	20 mm	20 mm	20 mm
memory density	2359296 bi	2359296 bit	2359296 bi
Memory IC Type	CACHE SRAM	CACHE SRAM	CACHE SRAM
memory width	36	36	36
Number of functions	1	1	1
Number of terminals	100	100	100
word count	65536 words	65536 words	65536 words
character code	64000	64000	64000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	85 °C	85 °C	70 °C
Minimum operating temperature	-40 °C	-40 °C	-
organize	64KX36	64KX36	64KX36
Output characteristics	3-STATE	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	LQFP	LQFP	LQFP
Encapsulate equivalent code	QFP100,.63X.87	QFP100,.63X.87	QFP100,.63X.87
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE
Parallel/Serial	PARALLEL	PARALLEL	PARALLEL
Peak Reflow Temperature (Celsius)	260	NOT SPECIFIED	NOT SPECIFIED
power supply	2.5/3.3,3.3 V	2.5/3.3,3.3 V	2.5/3.3,3.3 V
Certification status	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.6 mm	1.6 mm	1.6 mm
Maximum standby current	0.04 A	0.04 A	0.035 A
Minimum standby current	3.14 V	3.14 V	3.14 V
Maximum slew rate	0.2 mA	0.19 mA	0.19 mA
Maximum supply voltage (Vsup)	3.465 V	3.465 V	3.465 V
Minimum supply voltage (Vsup)	3.135 V	3.135 V	3.135 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES
technology	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	COMMERCIAL
Terminal surface	Matte Tin (Sn) - annealed	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	GULL WING	GULL WING	GULL WING
Terminal pitch	0.65 mm	0.65 mm	0.65 mm
Terminal location	QUAD	QUAD	QUAD
Maximum time at peak reflow temperature	40	NOT SPECIFIED	NOT SPECIFIED
width	14 mm	14 mm	14 mm

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