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GAL20V8AS-25QB3

Description
EE PLD
CategoryProgrammable logic devices    Programmable logic   
File Size766KB,14 Pages
ManufacturerSTMicroelectronics
Websitehttp://www.st.com/
Download Datasheet Parametric Compare View All

GAL20V8AS-25QB3 Overview

EE PLD

GAL20V8AS-25QB3 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerSTMicroelectronics
package instructionDIP, DIP24,.3
Reach Compliance Code_compli
ArchitecturePAL-TYPE
maximum clock frequency28.5 MHz
JESD-30 codeR-PDIP-T24
JESD-609 codee0
Number of entries20
Output times8
Number of product terms64
Number of terminals24
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output functionMACROCELL
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP24,.3
Package shapeRECTANGULAR
Package formIN-LINE
power supply5 V
Programmable logic typeEE PLD
propagation delay25 ns
Certification statusNot Qualified
Nominal supply voltage5 V
surface mountNO
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL

GAL20V8AS-25QB3 Related Products

GAL20V8AS-25QB3 GAL20V8-15HF1 GAL20V8-25HF1
Description EE PLD EE PLD EE PLD
Is it Rohs certified? incompatible incompatible incompatible
Maker STMicroelectronics STMicroelectronics STMicroelectronics
Reach Compliance Code _compli not_compliant not_compliant
Architecture PAL-TYPE PAL-TYPE PAL-TYPE
maximum clock frequency 28.5 MHz 41.6 MHz 28.5 MHz
JESD-30 code R-PDIP-T24 R-XDIP-T24 R-XDIP-T24
JESD-609 code e0 e0 e0
Number of entries 20 20 20
Output times 8 8 8
Number of product terms 64 64 64
Number of terminals 24 24 24
Maximum operating temperature 85 °C 70 °C 70 °C
Output function MACROCELL MACROCELL MACROCELL
Package body material PLASTIC/EPOXY CERAMIC CERAMIC
encapsulated code DIP DIP DIP
Encapsulate equivalent code DIP24,.3 DIP24,.3 DIP24,.3
Package shape RECTANGULAR RECTANGULAR RECTANGULAR
Package form IN-LINE IN-LINE IN-LINE
power supply 5 V 5 V 5 V
Programmable logic type EE PLD EE PLD EE PLD
propagation delay 25 ns 15 ns 25 ns
Certification status Not Qualified Not Qualified Not Qualified
Nominal supply voltage 5 V 5 V 5 V
surface mount NO NO NO
technology CMOS CMOS CMOS
Temperature level INDUSTRIAL COMMERCIAL COMMERCIAL
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE
Terminal pitch 2.54 mm 2.54 mm 2.54 mm
Terminal location DUAL DUAL DUAL
Base Number Matches - 1 1

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