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UCC3958 -1/-2/-3/-4
Single Cell Lithium-Ion Battery Protection Circuit
FEATURES
•
Protects Sensitive Lithium-Ion Cells Form
Over Charging and Over Discharging
•
Dedicated for One Cell Applications
•
Does Not Require External FETs or Sense
Resistors
•
Internal Precision Trimmed Charge and
Discharge Voltage Limits
•
Extremely Low Power Drain
•
Low FET Switch Voltage Drop of 150mV
Typical for 3A Currents
•
Short Circuit Current Protection (with User
Programmable Delay)
•
3A Current Capacity
•
Thermal Shutdown
•
User Controlled Enable Pin
PRELIMINARY
DESCRIPTION
UCC3958 is a monolithic BCMOS lithium-ion battery protection
circuit that is designed to enhance the useful operating life of
one cell rechargeable battery packs. Cell protection features
consist of internally trimmed charge and discharge voltage lim-
its, discharge current limit with a delayed shutdown and an ultra
low current sleep mode state when the cell is discharged. Addi-
tional features include an on chip MOSFET for reduced exter-
nal component count and a charge pump for reduced power
losses while charging or discharging a low cell voltage battery
pack. This protection circuit requires a minimum number of ex-
ternal components and is able to operate and safely shutdown
in the presence of a short circuit load.
BLOCK DIAGRAM
UDG-98050
6/98
UCC3958 -1/-2/-3/-4
ABSOLUTE MAXIMUM RATINGS
Supply Voltage (PACK+ to BNEG) . . . . . . . . . . . . . . . . . . . 7.5V
Maximum Continuous Charge Current . . . . . . . . . . . . . . . . . 3A
Maximum Charger Voltage (PACK+ to PACK–) . . . . . . . . . . 9V
Maximum Reverse Voltage (PACK+ to PACK–) . . . . . . . . . –8V
Storage Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . –55°C to +150°C
Lead Temperature (Soldering, 10 sec.) . . . . . . . . . . . . . +300°C
Currents are positive into, negative out of the specified terminal.
Consult Packaging Section of Databook for thermal limitations and
considerations of packages.
CONNECTION DIAGRAMS
SOIC-16 (Top View)
DP Package
TSSOP-24 (Top View)
PWP Package
ELECTRICAL CHARACTERISTICS:
Unless otherwise specified, PACK+ = 4V, –20°C < T
A
< 70°C. All voltages
measured with respect to BNEG. T
A
= T
J.
PARAMETER
State Transition Thresholds
NORM to OV (V
OV
)
OV to NORM (V
THI
)
NORM to OV (V
OV
)
OV to NORM (V
THI
)
NORM to OV (V
OV
)
OV to NORM (V
THI
)
NORM to OV (V
OV
)
OV to NORM (V
THI
)
NORM to UV (V
UV
)
UV to NORM (V
TLO
)
OV, UV Delay Time (T
D
)
All Dash Numbers
UCC3958-1
UCC3958-1
UCC3958-2
UCC3958-2
UCC3958-3
UCC3958-3
UCC3958-4
UCC3958-4
(Note 1)
4.15
3.85
4.20
3.90
4.25
3.95
4.30
4.00
2.25
2.55
7
4.20
3.90
4.25
3.95
4.30
4.00
4.35
4.05
2.35
2.65
18
4.25
3.95
4.30
4.00
4.35
4.05
4.40
4.10
2.45
2.75
34
V
V
V
V
V
V
V
V
V
V
msec
TEST CONDITIONS
MIN
TYP
MAX UNITS
2
UCC3958 -1/-2/-3/-4
ELECTRICAL CHARACTERISTICS:
Unless otherwise specified, PACK+ = 4V, –20°C < T
A
< 70°C. All voltages
measured with respect to BNEG. T
A
= T
J.
PARAMETER
BNEG/PACK - SWITCH
V
BNEG
- V
PACK
NORM, I
SWITCH
= 2A
NORM, I
SWITCH
= –2A
V
PACK
+ > V
OV
, I
SWITCH
= 20mA to 2A,
(OV State)
V
PACK
+ = 2.5V, I
SWITCH
= –20mA to –2A,
(UV State)
RDS
ON
I
BNEG
– (Charger Leakage Current in OV)
BIAS Current
I
PACK
+
I
PACK
+
V
BAT
Battery Sample Rate (T
S
)
Short Circuit Protection
ITHLD
TDLY
CDLY = 0
CDLY = 100pF
(Maximum Recommended Value)
R
RESET
LPWARN Output
LP Warn Threshold
TR
TF
V
HIGH
(V
PACK
+ –V
LPWARN
)
V
LOW
Measure Delay
OVUVB Output
TR
TF
V
HIGH
(V
PACK+
– V
OVUVB
)
V
LOW
Z
OUT
Measure Delay
CE Input
I
SINK
150
nA
C
LOAD
= 100pF, Hi Z to 90% of PACK+
C
LOAD
= 100pF, Hi Z to 10% of PACK+
I
SOURCE
= 200µA, V
PACK+
≥
V
OV
I
SINK =
200µA, V
PACK+
≤
V
UV
Output Tristated
280
140
0.3
0.3
10
18
560
280
0.4
0.4
ns
ns
V
V
MΩ
ms
C
LOAD
= 100pF, 10% to 90% of PACK+
C
LOAD
= 100pF, 10% to 90% of PACK+
I
SINK
= 200µA, V
UV
< V
PACK
+ < V
TLO
I
SOURCE
= 200µA, V
TLO
< V
PACK+
< V
UV
2.55
2.65
280
120
0.3
0.3
6
2.75
560
280
0.4
0.4
V
ns
ns
V
V
ms
Overcurrent Reset Resistance
7.5
2.75
5.25
350
2.5
7.25
A
µs
ms
M
Ω
V
PACK
+ > V
UV
In Super Low Power Mode (V
PACK
+ < V
UV
)
Minimum Operating Cell Voltage
7
12
7
1
20
1.5
1.5
17
µA
µA
V
ms
NORM I
SWITCH
= 2A
NORM I
SWITCH
= –2A
V
PACK
+ > V
OV
(OV State)
([V
PACK
+] – [V
PACK
–]=6V)
–100
100
–100
100
50
50
1
–150
150
–300
600
75
75
20
mV
mV
mV
mV
mΩ
mΩ
µA
TEST CONDITIONS
MIN
TYP
MAX UNITS
Note 1: Other threshold voltages are available.
3
UCC3958 -1/-2/-3/-4
PIN DESCRIPTIONS
BNEG:
Connect the negative terminal of the battery to
these pins.
CBPS:
This power supply bypass pin is connected to
PACK+ through an internal 10k resistor. An external
capacitor must be connected between this pin and
BNEG. This capacitor functions as temporary charge
storage for high current conditions (short circuit).
Minimum capacitor value is 0.15µF. This value should be
increased if the CDLY cap is used.
CDLY:
Delay control pin for the short circuit protection
feature. A capacitor connected between this pin and the
BNEG pin will increase the time delay for sensing an
over current condition. This adjustment may be useful in
those applications where high peak load currents may
momentarily exceed the protection circuit’s threshold and
interruption of the battery current would be undesirable.
The nominal delay time is set internally at 350µs
CEB:
Chip Enable Bar. This pin is pulled low (wrt BNEG)
by a 100nA current source. In order to disable the IC, the
user must pull this pin high to PACK+.
LPWARN:
Low Power Warning Indicator. This pin is
forced high when the battery voltage drops below V
TLO
(nominally 2.65V). This pin will stay high until the
detected battery voltage goes above V
TLO
, or UV
condition is declared.
OVUVB:
This pin is an overvoltage/undervoltage
condition indicator. Under normal operating conditions
this pin is tristated. When an overvoltage (OV) state is
detected, this pin is pulled high. When undervoltage (UV)
condition is detected, this pin is pulled low.
PACK+:
Connect to the positive terminal of the battery.
This pin is available to the user.
PACK-:
These pins should be connected to the negative
terminal of the battery pack (negative terminal available
to the user). The internal FET switch connects this
terminal to the BNEG terminal to give the battery pack
user appropriate access to the battery. In an overcharged
state, only discharge current is permitted. In an
overdischarged state, only charge current is permitted.
SUB:
Do not connect. These pins must be electrically
isolated from all other pins. These pins may be soldered
to isolated copper pads for heatsinking. This will improve
heat transfer, which may be necessary at high load
currents.
APPLICATION INFORMATION
Battery Voltage Monitoring
The battery cell voltage is sampled every 12ms by con-
necting a resistor divider across it and comparing the re-
sulting voltage to a precision internal reference voltage.
Under normal conditions (cell voltage is below Over Volt-
age threshold and above Under Voltage threshold), the
UCC3958 consumes approximately 7µA of current and
the internal MOSFET is turned on with an R
DSON
of
50mΩ. The UCC3958 contains an on-chip Charge Pump
to ensure that the internal MOSFET gate is driven high
for complete turn-on, reducing power losses. The charge
pump switches and capacitors are all internal.
When the cell voltage falls below the Under Voltage
threshold for two consecutive samples, the IC discon-
nects the load from the battery pack and enters a super
low power mode (nominally 1µA). The pack will remain
in this state until it detects the application of a charger, at
which point controlled charging is enabled. The require-
ment of two consecutive readings below the UV thresh-
old filters out momentary drops in cell voltage due to load
transients, preventing nuisance trips.
If the cell voltage exceeds the Over Voltage threshold for
two consecutive samples, charging is disabled, however
discharge current is still allowed. This feature of the IC is
explained further in the section on Controlled Charge/
Discharge Mode.
0.10
0.08
OHMS
0.06
0.04
0.02
0.00
2.6
3.0
3.4
3.8
CELL VOLTAGE
4.2
Figure 1. Typical Rdson vs Cell Voltage (DP Package
Pin 7 to Pin 10, at 25°C, 1 Amp Load)
4
Power technology
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