W25Q32BW
1.8V 32M-BIT
SERIAL FLASH MEMORY WITH
DUAL AND QUAD SPI
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Publication Release Date: July 08, 2010
Preliminary - Revision E
W25Q32BW
Table of Contents
1.
2.
3.
4.
5.
6.
7.
GENERAL DESCRIPTION ............................................................................................................... 5
FEATURES....................................................................................................................................... 5
PIN CONFIGURATION SOIC 150 / 208-MIL ................................................................................... 6
PAD CONFIGURATION WSON 6X5-MM AND 8X6-MM................................................................. 6
PIN DESCRIPTION SOIC 150 / 208-MIL, AND WSON 6X5-MM / 8X6-MM.................................... 6
PIN CONFIGURATION SOIC 300-MIL ............................................................................................ 7
PIN DESCRIPTION SOIC 300-MIL .................................................................................................. 7
7.1
7.2
7.3
7.4
7.5
7.6
8.
9.
Package Types..................................................................................................................... 8
Chip Select (/CS).................................................................................................................. 8
Serial Data Input, Output and IOs (DI, DO and IO0, IO1, IO2, IO3) .................................... 8
Write Protect (/WP)............................................................................................................... 8
HOLD (/HOLD) ..................................................................................................................... 8
Serial Clock (CLK) ................................................................................................................ 8
BLOCK DIAGRAM............................................................................................................................ 9
FUNCTIONAL DESCRIPTION ....................................................................................................... 10
9.1
SPI OPERATIONS ............................................................................................................. 10
9.1.1
9.1.2
9.1.3
9.1.4
Standard SPI Instructions.....................................................................................................10
Dual SPI Instructions ............................................................................................................10
Quad SPI Instructions...........................................................................................................10
Hold Function .......................................................................................................................10
Write Protect Features..........................................................................................................11
9.2
10.
WRITE PROTECTION ....................................................................................................... 11
9.2.1
CONTROL AND STATUS REGISTERS ........................................................................................ 12
10.1
STATUS REGISTER .......................................................................................................... 12
10.1.1
10.1.2
10.1.3
10.1.4
10.1.5
10.1.6
10.1.7
10.1.8
10.1.9
10.1.10
10.1.11
10.1.12
BUSY..................................................................................................................................12
Write Enable Latch (WEL) ..................................................................................................12
Block Protect Bits (BP2, BP1, BP0)....................................................................................12
Top/Bottom Block Protect (TB)...........................................................................................12
Sector/Block Protect (SEC) ................................................................................................12
Complement Protect (CMP) ...............................................................................................13
Status Register Protect (SRP1, SRP0)...............................................................................13
Erase/Program Suspend Status (SUS) ..............................................................................13
Security Register Lock Bits (LB3, LB2, LB1, LB0) ..............................................................13
Quad Enable (QE) ............................................................................................................14
Status Register Memory Protection (CMP = 0).................................................................15
Status Register Memory Protection (CMP = 1).................................................................16
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W25Q32BW
10.2
INSTRUCTIONS................................................................................................................. 17
10.2.1
10.2.2
10.2.3
10.2.4
10.2.5
10.2.6
10.2.7
10.2.8
10.2.9
10.2.10
10.2.11
10.2.12
10.2.13
10.2.14
10.2.15
10.2.16
10.2.17
10.2.18
10.2.19
10.2.20
10.2.21
10.2.22
10.2.23
10.2.24
10.2.25
10.2.26
10.2.27
10.2.28
10.2.29
10.2.30
10.2.31
10.2.32
10.2.33
10.2.34
10.2.35
10.2.36
10.2.37
10.2.38
Manufacturer and Device Identification ..............................................................................17
Instruction Set Table 1 (Erase, Program Instructions) ........................................................18
Instruction Set Table 2 (Read Instructions) ........................................................................19
Instruction Set Table 3 (ID, Security Instructions)...............................................................20
Write Enable (06h)..............................................................................................................21
Write Disable (04h).............................................................................................................21
Read Status Register-1 (05h) and Read Status Register-2 (35h).......................................22
Write Status Register (01h) ................................................................................................23
Read Data (03h) .................................................................................................................24
Fast Read (0Bh) ...............................................................................................................25
Fast Read Dual Output (3Bh) ...........................................................................................26
Fast Read Quad Output (6Bh)..........................................................................................27
Fast Read Dual I/O (BBh).................................................................................................28
Fast Read Quad I/O (EBh) ...............................................................................................30
Word Read Quad I/O (E7h) ..............................................................................................32
Octal Word Read Quad I/O (E3h).....................................................................................34
Set Burst with Wrap (77h).................................................................................................36
Continuous Read Mode Bits (M7-0) .................................................................................37
Continuous Read Mode Reset (FFh or FFFFh) ................................................................37
Page Program (02h) .........................................................................................................38
Quad Input Page Program (32h) ......................................................................................39
Sector Erase (20h) ...........................................................................................................40
32KB Block Erase (52h) ...................................................................................................41
64KB Block Erase (D8h)...................................................................................................42
Chip Erase (C7h / 60h).....................................................................................................43
Erase / Program Suspend (75h) .......................................................................................44
Erase / Program Resume (7Ah) .......................................................................................45
Power-down (B9h) ............................................................................................................46
High Performance Mode (A3h) .........................................................................................47
Release Power-down or HPM / Device ID (ABh) ..............................................................47
Read Manufacturer / Device ID (90h) ...............................................................................49
Read Manufacturer / Device ID Dual I/O (92h) .................................................................50
Read Manufacturer / Device ID Quad I/O (94h)................................................................51
Read Unique ID Number (4Bh).........................................................................................52
Read JEDEC ID (9Fh) ......................................................................................................53
Erase Security Registers (44h).........................................................................................54
Program Security Registers (42h) ....................................................................................55
Read Security Registers (48h)..........................................................................................56
11.
ELECTRICAL CHARACTERISTICS .............................................................................................. 57
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Publication Release Date: July 08, 2010
Preliminary - Revision E
W25Q32BW
11.1
11.2
11.3
11.4
11.5
11.6
11.7
11.8
11.9
11.10
12.
12.1
12.2
12.3
12.4
12.5
13.
14.
13.1
Absolute Maximum Ratings................................................................................................ 57
Operating Ranges .............................................................................................................. 57
Power-up Timing and Write Inhibit Threshold .................................................................... 58
DC Electrical Characteristics.............................................................................................. 59
AC Measurement Conditions ............................................................................................. 60
AC Electrical Characteristics .............................................................................................. 61
AC Electrical Characteristics (cont’d)................................................................................. 62
Serial Output Timing........................................................................................................... 63
Input Timing........................................................................................................................ 63
Hold Timing ....................................................................................................................... 63
8-Pin SOIC 150-mil (Package Code SN) ........................................................................... 64
8-Pin SOIC 208-mil (Package Code SS) ........................................................................... 65
8-Contact 6x5mm WSON (Package Code ZP) .................................................................. 66
8-Contact 8x6mm WSON (Package Code ZE) .................................................................. 68
16-Pin SOIC 300-mil (Package Code SF).......................................................................... 69
Valid Part Numbers and Top Side Marking........................................................................ 71
PACKAGE SPECIFICATION.......................................................................................................... 64
ORDERING INFORMATION .......................................................................................................... 70
REVISION HISTORY...................................................................................................................... 72
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W25Q32BW
1. GENERAL DESCRIPTION
The W25Q32BW (32M-bit) Serial Flash memory provides a storage solution for systems with limited
space, pins and power. The 25Q series offers flexibility and performance well beyond ordinary Serial
Flash devices. They are ideal for code shadowing to RAM, executing code directly from Dual/Quad SPI
(XIP) and storing voice, text and data. The device operates on a single 1.70V to 1.95V power supply with
current consumption as low as 4mA active and 1µA for power-down. All devices are offered in space-
saving packages.
The W25Q32BW array is organized into 16,384 programmable pages of 256-bytes each. Up to 256 bytes
can be programmed at a time. Pages can be erased in groups of 16 (4KB sector erase), groups of 128
(32KB block erase), groups of 256 (64KB block erase) or the entire chip (chip erase). The W25Q32BW
has 1,024 erasable sectors and 64 erasable blocks respectively. The small 4KB sectors allow for greater
flexibility in applications that require data and parameter storage. (See figure 2.)
The W25Q32BW supports the standard Serial Peripheral Interface (SPI), and a high performance
Dual/Quad output as well as Dual/Quad I/O SPI: Serial Clock, Chip Select, Serial Data I/O0 (DI), I/O1
(DO), I/O2 (/WP), and I/O3 (/HOLD). SPI clock frequencies of up to 80MHz are supported allowing
equivalent clock rates of 160MHz for Dual I/O and 320MHz for Quad I/O when using the Fast Read
Dual/Quad I/O instructions. These transfer rates can outperform standard Asynchronous 8 and 16-bit
Parallel Flash memories. The Continuous Read Mode allows for efficient memory access with as few as
8-clocks of instruction-overhead to read a 24-bit address, allowing true XIP (execute in place) operation.
A Hold pin, Write Protect pin and programmable write protection, with top or bottom array control,
provide further control flexibility. Additionally, the device supports JEDEC standard manufacturer and
device identification with a 64-bit Unique Serial Number.
2. FEATURES
•
Family of SpiFlash Memories
– W25Q32BW: 32M-bit / 4M-byte (4,194,304)
– 256-byte per programmable page
– Standard SPI: CLK, /CS, DI, DO, /WP, /Hold
– Dual SPI: CLK, /CS, IO
0
, IO
1
, /WP, /Hold
– Quad SPI: CLK, /CS, IO
0
, IO
1
, IO
2
, IO
3
Highest Performance Serial Flash
– Up to 80MHz clock operation
– 160/320MHz equivalent Dual/Quad SPI
– 40MB/S continuous data transfer rate
– Up to 6X that of ordinary Serial Flash
– More than 100,000 erase/program cycles
– More than 20-year data retention
Efficient “Continuous Read Mode”
– Low Instruction overhead
– Continuous Read with 8/16/32/64-Byte Wrap
– As few as 8 clocks to address memory
– Allows true XIP (execute in place) operation
– Outperforms X16 Parallel Flash
•
Low Power, Wide Temperature Range
– Single 1.70 to 1.95V supply
– 4mA active current, <1µA Power-down (typ.)
– -40°C to +85°C operating range
•
Flexible Architecture with 4KB sectors
– Uniform Sector Erase (4K-bytes)
– Uniform Block Erase (32K and 64K-bytes)
– Program one to 256 bytes
– Erase/Program Suspend & Resume
Advanced Security Features
– Software and Hardware Write-Protect
– Top/Bottom, 4KB complement array protection
(1)
– Power Lock-Down and OTP array protection
– 64-Bit Unique ID for each device
– 4X256-Byte Security Registers with OTP locks
Space Efficient Packaging
– 8-pin SOIC 150
(2)
/ 208-mil
– 8-pad WSON 6x5-mm / 8x6-mm
(2)
– 16-pin SOIC 300-mil
– Contact Winbond for KGD and other options
•
•
•
•
Note: 1. Contact Winbond for details.
2. Packages SOIC8 150mil and WSON8 8x6-mm are special order packages, please contact Winbond for ordering
information.
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Publication Release Date: July 08, 2010
Preliminary - Revision E
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