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ATF1504ASL-25JU44

Description
EE PLD, 10ns, PQCC44
CategoryProgrammable logic devices    Programmable logic   
File Size457KB,35 Pages
ManufacturerAtmel (Microchip)
Environmental Compliance
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ATF1504ASL-25JU44 Overview

EE PLD, 10ns, PQCC44

ATF1504ASL-25JU44 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
Parts packaging codeLPCC
package instructionLCC-44
Contacts44
Reach Compliance Codeunknow
ECCN codeEAR99
Other featuresPOWER -UP RESET; SECURITY FUSE
maximum clock frequency60 MHz
In-system programmableYES
JESD-30 codeS-PQCC-J44
JTAG BSTYES
length16.5862 mm
Dedicated input times
Number of I/O lines32
Number of entries32
Number of macro cells64
Output times32
Number of product terms40
Number of terminals44
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize0 DEDICATED INPUTS, 32 I/O
Output functionMACROCELL
Package body materialPLASTIC/EPOXY
encapsulated codeQCCJ
Encapsulate equivalent codeLDCC44,.7SQ
Package shapeSQUARE
Package formCHIP CARRIER
Programmable logic typeEE PLD
propagation delay25 ns
Certification statusNot Qualified
Maximum seat height4.57 mm
Maximum supply voltage5.5 V
Minimum supply voltage4.5 V
Nominal supply voltage5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationQUAD
width16.5862 mm
Base Number Matches1
Features
High-density, High-performance, Electrically-erasable Complex Programmable
Logic Device
– 64 Macrocells
– 5 Product Terms per Macrocell, Expandable up to 40 per Macrocell
– 44, 68, 84, 100 Pins
– 7.5 ns Maximum Pin-to-pin Delay
– Registered Operation up to 125 MHz
– Enhanced Routing Resources
In-System Programmability (ISP) via JTAG
Flexible Logic Macrocell
– D/T/Latch Configurable Flip-flops
– Global and Individual Register Control Signals
– Global and Individual Output Enable
– Programmable Output Slew Rate
– Programmable Output Open Collector Option
– Maximum Logic Utilization by Burying a Register with a COM Output
Advanced Power Management Features
– Automatic µA Standby for “L” Version
– Pin-controlled 1 mA Standby Mode
– Programmable Pin-keeper Circuits on Inputs and I/Os
– Reduced-power Feature per Macrocell
Available in Commercial and Industrial Temperature Ranges
Available in 44-, 68-, and 84-lead PLCC; 44- and 100-lead TQFP; and 100-lead PQFP
Advanced EE Technology
– 100% Tested
– Completely Reprogrammable
– 10,000 Program/Erase Cycles
– 20-year Data Retention
– 2000V ESD Protection
– 200 mA Latch-up Immunity
JTAG Boundary-scan Testing to IEEE Std. 1149.1-1990 and 1149.1a-1993 Supported
PCI-compliant
3.3V or 5.0V I/O Pins
Security Fuse Feature
Green (Pb/Halide-fee/RoHS Compliant) Package Options
High-
performance
Complex
Programmable
Logic Device
ATF1504AS
ATF1504ASL
Enhanced Features
Improved Connectivity (Additional Feedback Routing, Alternate Input Routing)
Output Enable Product Terms
Transparent – Latch Mode
Combinatorial Output with Registered Feedback within Any Macrocell
Three Global Clock Pins
ITD (Input Transition Detection) Circuits on Global Clocks, Inputs and I/O
Fast Registered Input from Product Term
Programmable “Pin-keeper” Option
V
CC
Power-up Reset Option
Pull-up Option on JTAG Pins TMS and TDI
Advanced Power Management Features
– Edge-controlled Power-down “L”
– Individual Macrocell Power Option
– Disable ITD on Global Clocks, Inputs and I/O
Rev. 0950O–PLD–7/05
1

ATF1504ASL-25JU44 Related Products

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Description EE PLD, 10ns, PQCC44 EE PLD, 10ns, PQCC44 EE PLD, 10ns, PQCC44 EE PLD, 10ns, PQCC44 EE PLD, 10ns, PQCC44 EE PLD, 10 ns, PQCC84 EE PLD, 10ns, PQCC44 EE PLD, 25 ns, PQFP100
Is it Rohs certified? conform to conform to incompatible incompatible incompatible conform to incompatible conform to
Parts packaging code LPCC QFP LCC QFP QFP LCC QFP QFP
package instruction LCC-44 TQFP, TQFP44,.47SQ,32 PLASTIC, MS-018AF, LCC-84 TQFP, TQFP44,.47SQ,32 QFP, QFP100,.7X.9 LCC-84 TFQFP, TQFP100,.63SQ TFQFP, TQFP100,.63SQ
Contacts 44 44 84 44 100 84 100 100
Reach Compliance Code unknow unknow unknow unknow unknow unknow unknow unknow
Other features POWER -UP RESET; SECURITY FUSE POWER -UP RESET; SECURITY FUSE YES YES YES POWER -UP RESET; SECURITY FUSE YES POWER -UP RESET; SECURITY FUSE
maximum clock frequency 60 MHz 166.7 MHz 83.3 MHz 60 MHz 60 MHz 125 MHz 60 MHz 60 MHz
In-system programmable YES YES YES YES YES YES YES YES
JESD-30 code S-PQCC-J44 S-PQFP-G44 S-PQCC-J84 S-PQFP-G44 R-PQFP-G100 S-PQCC-J84 S-PQFP-G100 S-PQFP-G100
JTAG BST YES YES YES YES YES YES YES YES
length 16.5862 mm 10 mm 29.3116 mm 10 mm 20 mm 29.3116 mm 14 mm 14 mm
Number of I/O lines 32 32 64 32 64 64 64 64
Number of macro cells 64 64 64 64 64 64 64 64
Number of terminals 44 44 84 44 100 84 100 100
Maximum operating temperature 85 °C 70 °C 70 °C 85 °C 85 °C 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C - - -40 °C -40 °C -40 °C -40 °C -40 °C
organize 0 DEDICATED INPUTS, 32 I/O 0 DEDICATED INPUTS, 32 I/O 0 DEDICATED INPUTS, 64 I/O 0 DEDICATED INPUTS, 32 I/O 0 DEDICATED INPUTS, 64 I/O 0 DEDICATED INPUTS, 64 I/O 0 DEDICATED INPUTS, 64 I/O 0 DEDICATED INPUTS, 64 I/O
Output function MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code QCCJ TQFP QCCJ TQFP QFP QCCJ TFQFP TFQFP
Encapsulate equivalent code LDCC44,.7SQ TQFP44,.47SQ,32 LDCC84,1.2SQ TQFP44,.47SQ,32 QFP100,.7X.9 LDCC44,.7SQ TQFP100,.63SQ TQFP100,.63SQ
Package shape SQUARE SQUARE SQUARE SQUARE RECTANGULAR SQUARE SQUARE SQUARE
Package form CHIP CARRIER FLATPACK, THIN PROFILE CHIP CARRIER FLATPACK, THIN PROFILE FLATPACK CHIP CARRIER FLATPACK, THIN PROFILE, FINE PITCH FLATPACK, THIN PROFILE, FINE PITCH
Programmable logic type EE PLD EE PLD EE PLD EE PLD EE PLD EE PLD EE PLD EE PLD
propagation delay 25 ns 7.5 ns 20 ns 25 ns 25 ns 10 ns 25 ns 25 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 4.57 mm 1.2 mm 4.57 mm 1.2 mm 3.4 mm 4.57 mm 1.2 mm 1.2 mm
Maximum supply voltage 5.5 V 5.25 V 5.25 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V
Minimum supply voltage 4.5 V 4.75 V 4.75 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V
Nominal supply voltage 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V
surface mount YES YES YES YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level INDUSTRIAL COMMERCIAL COMMERCIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal form J BEND GULL WING J BEND GULL WING GULL WING J BEND GULL WING GULL WING
Terminal pitch 1.27 mm 0.8 mm 1.27 mm 0.8 mm 0.65 mm 1.27 mm 0.5 mm 0.5 mm
Terminal location QUAD QUAD QUAD QUAD QUAD QUAD QUAD QUAD
width 16.5862 mm 10 mm 29.3116 mm 10 mm 14 mm 29.3116 mm 14 mm 14 mm
ECCN code EAR99 EAR99 - EAR99 - EAR99 - EAR99
JESD-609 code - e3 e0 e0 e0 - e0 e3
Humidity sensitivity level - 3 2 - 3 - 3 3
Peak Reflow Temperature (Celsius) - 260 225 240 225 - 240 260
power supply - 3.3/5,5 V 3.3/5,5 V 3.3/5,5 V 3.3/5,5 V - 3.3/5,5 V 3.3/5,5 V
Terminal surface - Matte Tin (Sn) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) - Tin/Lead (Sn/Pb) Matte Tin (Sn)
Maximum time at peak reflow temperature - 40 30 30 30 - 30 40
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