M1040-13-156.8324 datasheet, PDF

Datasheet> All Categories > Analog mixed-signal IC> The signal circuit> M1040-13-156.8324

M1040-13-156.8324: DescriptionPLL/Frequency Synthesis Circuit; CategoryAnalog mixed-signal IC The signal circuit; File Size326KB，12 Pages; ManufacturerIDT (Integrated Device Technology)

Download Datasheet Parametric View All

M1040-13-156.8324 Overview

PLL/Frequency Synthesis Circuit

M1040-13-156.8324 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
package instruction	,
Reach Compliance Code	unknown

Preview

Download Datasheet

View All

Integrated

Circuit

Systems, Inc.

Preliminary Information

M1040

VCSO B

ASED

LOCK

PLL

WITH

UTO

WITCH

SSIGNMENT

(9 x 9 mm SMT)

MR_SEL2

GND

AUTO

DIF_REF0

nDIF_REF0

REF_SEL

DIF_REF1

nDIF_REF1

VCC

MR_SEL1

MR_SEL0

REF_ACK

LOL

NBW

VCC

DNC

ENERAL

ESCRIPTION

The M1040 is a VCSO (Voltage Controlled SAW

Oscillator) based clock generator

PLL designed for clock protection,

frequency translation and jitter

attenuation in OC-12/48 class optical

networking systems. It features dual

differential inputs with two modes of

input selection: manual and

automatic upon clock failure. The clock multiplication

ratios and output divider ratio are pin selectable. This

device provides two outputs. External loop components

allow the tailoring of PLL loop response.

EATURES

◆

Integrated SAW (surface acoustic wave) delay line;

low phase jitter of < 0.5ps rms, typical (12kHz to

20MHz)

◆

Output frequencies of 62.5 to 175 MHz

; Two differen-

tial LVPECL outputs (CML, LVDS options available)

◆

Loss of Lock (LOL) indicator output

◆

Narrow Bandwidth control input (NBW pin);

Initialization (INIT) input overrides NBW at power-up

◆

Dual reference clock inputs support LVDS, LVPECL,

LVCMOS, LVTTL

◆

AutoSwitch (AUTO pin) - automatic (non-revertive)

reference clock reselection upon clock failure; Hitless

Switching (HS), Phase Build-out (PBO) options enable

SONET (GR-253)/SDH (G.813) MTIE/TDEV compliance

◆

Acknowledge pin (REF_ACK pin) indicates the actively

selected reference input

◆

Industrial temperature available

◆

Single 3.3V power supply

◆

Small 9 x 9 mm SMT (surface mount) package

M1040

(Top View)

P_SEL

INIT

nFOUT0

FOUT0

GND

nFOUT1

FOUT1

VCC

GND

Figure 1: Pin Assignment

Example I/O Clock Frequency Combinations

Using

M1040-11-155.5200

Input Reference

Clock (MHz)

19.44

77.76

155.52

622.08

PLL Ratio

(Pin Selectable)

GND

OP_IN

nOP_OUT

nVC

OP_OUT

nOP_IN

Output Clock

(MHz)

(Pin Selectable)

0.25

155.52

77.76

Table 1: Example I/O Clock Frequency Combinations

* Specify VCSO center frequency at time of order.

IMPLIFIED

LOCK

IAGRAM

Loop Filter

M1040

NBW

MUX

PLL

Phase

Detector

DIF_REF0

nDIF_REF0

DIF_REF1

nDIF_REF1

REF_ACK

REF_SEL

AUTO

Auto

INIT

LOL

MR_SEL2:0

Ref Sel

R Div

VCSO

M Divider

LOL

Phase

Detector

M / R Divider

P Divider

(1 or 2)

FOUT0

nFOUT0

FOUT1

nFOUT1

LUT

P_SEL

Figure 2: Simplified Block Diagram

M1040 Datasheet Rev 0.1

M1040 VCSO Based Clock PLL with AutoSwitch

Revised 11Nov2003

●

Integrated Circuit Systems, Inc.

Communications Modules

●

w w w. i c s t . c o m

●

tel (508) 852-5400

Recommended Resources

Circuit diagram of two wireless microphones made by 3DG12

Boost circuit diagram composed of LAS6350 and VDMOS

Temperature-Pulse Width Conversion Circuit

Electric hoist remote control electrical wiring

Flashing road sign light circuit

Typical application circuit diagram of μA723

MSP430 MCU matrix keyboard driver LED: 1#includemsp430F169.h2 //Custom data structure for easy use3 #define uchar unsigned char4 #define uint unsigned int5 #define ulong unsigned long6 /*7 * Software delay function8 */9 #define CPU_F ((dou...; Aguilera Microcontroller MCU

【Smart Sports Watch】2. Build Development Environment 1: [i=s]This post was last edited by hehung on 2021-4-18 15:41[/i]Now we have entered the development stage, and the first step is to build a development environment.1. The first thing is to download the...; hehung onsemi and Avnet IoT Innovation Design Competition

Low Power Wi-Fi: How Application Attributes Affect Energy Consumption: There are many times when we can greatly improve the energy consumption of Wi-Fi-based systems by properly configuring system properties to minimize energy-wasting operations.One of the most energy-wa...; 火辣西米秀 RF/Wirelessly

USB Type-C interface desktop monitor dedicated solution - single interface solution: Single USB Type-C interface, with HDMI/USB extension and DC power supply, a typical form of desktop monitor. The entire monitor inputs a high-power power supply similar to 24V/3A through the DC interf...; LEGENDARYEEW Domestic Chip Exchange

How is this switching transformer wound?: What is two-layer series winding, what is two-layer series winding, what is three-layer parallel winding, and what is several wires and how many turns? I am completely confused. I feel that the design...; _earth Power technology

How to delete products on Pingtouge's scenario-based Bluetooth Mesh cloud platform: The project created incorrectly on the Life IoT platform needs to be deleted. If a test device has been added, it will prompt that the deletion failed. There is no corresponding option to delete the t...; littleshrimp Domestic Chip Exchange

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components