1812Y0500105JDT datasheet, PDF

1812Y0500105JDT: DescriptionCeramic Capacitor, Multilayer, Ceramic, 50V, 5% +Tol, 5% -Tol, X7R, 15% TC, 1uF, Surface Mount, 1812, CHIP, ROHS COMPLIANT; CategoryPassive components capacitor; File Size548KB，9 Pages; ManufacturerSyfer; Environmental Compliance

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1812Y0500105JDT Overview

Ceramic Capacitor, Multilayer, Ceramic, 50V, 5% +Tol, 5% -Tol, X7R, 15% TC, 1uF, Surface Mount, 1812, CHIP, ROHS COMPLIANT

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Syfer
package instruction	, 1812
Reach Compliance Code	compliant
ECCN code	EAR99
capacitance	1 µF
Capacitor type	CERAMIC CAPACITOR
dielectric materials	CERAMIC
JESD-609 code	e3
Manufacturer's serial number	X7R
Installation features	SURFACE MOUNT
multi-layer	Yes
negative tolerance	5%
Number of terminals	2
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package shape	RECTANGULAR PACKAGE
method of packing	TR, 7 INCH
positive tolerance	5%
Rated (DC) voltage (URdc)	50 V
Guideline	IECQ-CECC
size code	1812
surface mount	YES
Temperature characteristic code	X7R
Temperature Coefficient	15% ppm/°C
Terminal surface	Matte Tin (Sn) - with Nickel (Ni) barrier
Terminal shape	WRAPAROUND

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