PSN1100A_10 datasheet, PDF - EEWORLD Datasheet

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PSN1100A_10: DescriptionPHASE LOCKED LOOP; File Size65KB，2 Pages; ManufacturerZ-Communications, Inc.; Websitehttps://www.zcomm.com/

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PSN1100A_10 Overview

PHASE LOCKED LOOP

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PSN1100A

14118 Stowe Drive, Suite B | Poway, CA 92064

TEL: (858) 621-2700 | FAX: (858) 486-1927

PHASE LOCKED LOOP

Rev A1

PHASE NOISE (1 Hz BW, typical)

-60

-80

-100

FEATURES

• Frequency Range: 1076 - 1130 MHz

• Step Size:

50 KHz

• PLL - Style Package

APPLICATIONS

• Basestations

• Mobile Radios

• Satellite Communications

PERFORMANCE SPECIFICATIONS

Frequency Range

-120

-140

-160

100 Hz

1 kHz

VALUE

1076

1130

-105

-15

-70

3±2

1000

-40 to +85

PLL

Vdc

mSec

°C

kHz

10 kHz

UNITS

MHz

dBc/Hz

dBc

dBm

100 kHz

Phase Noise @ 10 kHz offset (1 Hz BW, typ.)

Harmonic Suppression (2nd, typ.)

Sideband Spurs (typ.)

Power Output

Load Impedance

Step Size

Charge Pump Output Current

Switching Speed (typ., adjacent channel)

Startup Lock Time (typ.)

Operating Temperature Range

Package Style

POWER SUPPLY REQUIREMENTS

Supply Voltage (Vcc, nom.)

Supply Current (Icc, typ.)

All specifications are typical unless otherwise noted and subject to change without notice.

APPLICATION NOTES

•

AN-107 : How to Solder Z-COMM VCOs / PLLs

•

AN-202 : PLL Functional Description

NOTES:

Reference Oscillator Signal: 5 MHz<

<40 MHz

Frequency Synthesizer: National Semiconductor - LMX2316

Page 1

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