SIP2214DMP-OV-T1 datasheet, PDF

SIP2214DMP-OV-T1: DescriptionIC VREG DUAL OUTPUT, FIXED POSITIVE LDO REGULATOR, PDSO10, 3 X 3 MM, LEAD FREE, MLP-10, Fixed Positive Multiple Output LDO Regulator; CategoryPower/power management The power supply circuit; File Size291KB，11 Pages; ManufacturerVishay; Websitehttp://www.vishay.com

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SIP2214DMP-OV-T1 Overview

IC VREG DUAL OUTPUT, FIXED POSITIVE LDO REGULATOR, PDSO10, 3 X 3 MM, LEAD FREE, MLP-10, Fixed Positive Multiple Output LDO Regulator

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Vishay
Parts packaging code	SOIC
package instruction	HVSSOF, SOLCC10,.11,20
Contacts	10
Reach Compliance Code	unknown
ECCN code	EAR99
Adjustability	FIXED
Maximum drop-back voltage 1	0.25 V
Nominal dropback voltage 1	0.24 V
Maximum drop-back voltage 2	0.42 V
Maximum absolute input voltage	7 V
Maximum input voltage	5.5 V
Minimum input voltage	2.25 V
JESD-30 code	S-PDSO-F10
JESD-609 code	e0
length	3 mm
Maximum grid adjustment rate	0.0216%
Maximum load regulation	0.054%
Number of functions	1
Output times	2
Number of terminals	10
Working temperatureTJ-Max	125 °C
Working temperature TJ-Min	-40 °C
Maximum output current 1	0.15 A
Maximum output current 2	0.3 A
Maximum output voltage 1	2.958 V
Minimum output voltage 1	2.842 V
Nominal output voltage 1	2.9 V
Maximum output voltage 2	3.672 V
Minimum output voltage 2	3.528 V
Nominal output voltage 2	3.6 V
Package body material	PLASTIC/EPOXY
encapsulated code	HVSSOF
Encapsulate equivalent code	SOLCC10,.11,20
Package shape	SQUARE
Package form	SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE, SHRINK PITCH
method of packing	TAPE AND REEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
Regulator type	FIXED POSITIVE MULTIPLE OUTPUT LDO REGULATOR
Maximum seat height	1 mm
surface mount	YES
technology	CMOS
Terminal form	FLAT
Terminal pitch	0.5 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
Maximum voltage tolerance	2%
width	3 mm

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