PDM42235L15G datasheet, PDF - EEWORLD Datasheet

PDM42235L15G: DescriptionFIFO, 2KX18, 9ns, Synchronous, CMOS, CPGA68; Categorystorage storage; File Size993KB，15 Pages; ManufacturerParadigm Technology Inc

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PDM42235L15G Overview

FIFO, 2KX18, 9ns, Synchronous, CMOS, CPGA68

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Paradigm Technology Inc
package instruction	PGA, PGA68,11X11
Reach Compliance Code	unknown
ECCN code	EAR99
Maximum access time	9 ns
Other features	RETRANSMIT
Maximum clock frequency (fCLK)	66.7 MHz
period time	15 ns
JESD-30 code	S-CPGA-P68
JESD-609 code	e0
memory density	36864 bit
Memory IC Type	OTHER FIFO
memory width	18
Number of functions	1
Number of terminals	68
word count	2048 words
character code	2000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	2KX18
Output characteristics	3-STATE
Exportable	YES
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA
Encapsulate equivalent code	PGA68,11X11
Package shape	SQUARE
Package form	GRID ARRAY
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Certification status	Not Qualified
Maximum standby current	0.07 A
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	PIN/PEG
Terminal pitch	2.54 mm
Terminal location	PERPENDICULAR
Maximum time at peak reflow temperature	NOT SPECIFIED

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

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