CY7B339-7DC datasheet, PDF - EEWORLD Datasheet

CY7B339-7DC: DescriptionOT PLD, 7ns, PAL-Type, BICMOS, CDIP28, 0.300 INCH, CERDIP-28; CategoryProgrammable logic devices Programmable logic; File Size167KB，6 Pages; ManufacturerCypress Semiconductor

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CY7B339-7DC Overview

OT PLD, 7ns, PAL-Type, BICMOS, CDIP28, 0.300 INCH, CERDIP-28

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Cypress Semiconductor
Parts packaging code	DIP
package instruction	0.300 INCH, CERDIP-28
Contacts	28
Reach Compliance Code	compliant
Other features	POWER-UP RESET
Architecture	PAL-TYPE
maximum clock frequency	142 MHz
JESD-30 code	R-GDIP-T28
JESD-609 code	e0
length	37.0205 mm
Dedicated input times	12
Number of I/O lines
Number of entries	12
Output times	8
Number of product terms	32
Number of terminals	28
Maximum operating temperature	70 °C
Minimum operating temperature
organize	12 DEDICATED INPUTS, 0 I/O
Output function	LATCHED
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DIP
Encapsulate equivalent code	DIP28,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Programmable logic type	OT PLD
propagation delay	7 ns
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	BICMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm

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