21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT16501/162501/162H501T
PI74FCT16501T
18-BIT REGISTERED TRANSCEIVERS
PI74FCT162501T
PI74FCT162H501T
Fast CMOS 18-Bit
Registered Transceivers
Product Features
Common Features:
• PI74FCT16501T, PI74FCT162501T, and PI74FCT162H501T
are high-speed,
low power devices with high current drive.
• V
CC
= 5V ±10%
• Hysteresis on all inputs
• Packages available
– 56-pin 240 mil wide plastic TSSOP (A)
– 56-pin 300 mil wide plastic SSOP (V)
PI74FCT16501T Features
• High output drive: I
OH
= –32 mA; I
OL
= 64 mA
• Power off disable outputs permit “live insertion”
• Typical V
OLP
(Output Ground Bounce) < 1.0V
at V
CC
= 5V, T
A
= 25°C
PI74FCT162501T Features
• Balanced output drivers: ±24 mA
• Reduced system switching noise
• Typical V
OLP
(Output Ground Bounce) < 0.6V
at V
CC
= 5V, T
A
= 25°C
PI74FCT162H501T Features
• Bus Hold retains last active bus state during 3-state
• Eliminates the need for external pull-up resistors
Product Description
Pericom Semiconductor’s PI74FCT series of logic circuits are pro-
duced in the Company’s advanced 0.6 micron CMOS technology,
achieving industry leading speed grades.
The PI74FCT16501T, PI74FCT162501T, and PI74FCT162H501T
are 18-bit are registered bus transceivers designed with D-type
latches and flip-flops to allow data flow in transparent, latched, and
clocked modes. The Output Enable (OEAB and OEBA, Latch
Enable (LEAB and LEBA) and Clock (CLKAB and CLKBA)
inputs control the data flow in each direction. When LEAB is
HIGH, the device operates in transparent mode for A-to-B data
flow. When LEAB is LOW, the A data is latched if CLKAB is held
at a HIGH or LOW logic level. The A bus data is stored in the latch/
flip-flop on the LOW-to-HIGH transition of CLKAB, if LEAB is LOW.
OEAB performs the output enable function on the B port. Data flow
from B port to A port is similar using OEBA, LEBA and CLKBA.
These high-speed, low power devices offer a flow-through
organization for ease of board layout.
The PI74FCT16501T output buffers are designed with a Power-Off
disable allowing "live insertion" of boards when used as backplane
drivers.
The PI74FCT162501T has ±24 mA balanced output drivers. It is
designed with current limiting resistors at its outputs to control the
output edge rate resulting in lower ground bounce and undershoot.
This eliminates the need for external terminating resistors for most
interface applications.
The PI74FCT162H501T has “Bus Hold” which retains the input’s
last state whenever the input goes to high-impedance preventing
“floating” inputs and eliminating the need for pull-up/down resistors.
Logic Block Diagram
OEAB
CLKBA
LEBA
OEBA
CLKAB
LEAB
C
A
1
D
C
B
1
D
C
D
C
D
TO 17 OTHER CHANNELS
1
PS2035A 03/11/96
Product Pin Description
Pin Name
OEAB
OEBA
LEAB
LEBA
CLKAB
CLKBA
Ax
Bx
GND
V
CC
Note:
Description
A-to-B Output Enable Input
B-to-A Output Enable Input (Active LOW)
A-to-B Latch Enable Input
B-to-A Latch Enable Input
A-to-B Clock Input
B-to-A Clock Input
A-to-B Data Inputs or B-to-A 3-State Outputs
(1)
B-to-A Data Inputs or A-to-B 3-State Outputs
(1)
Ground
Power
1. For the PI74FCT162H501T, these pins have “Bus
Hold.” All other pins are standard, outputs, or I/Os.
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT16501/162501/162H501T
18-BIT REGISTERED TRANSCEIVERS
Truth Table
(1,4)
OEAB
L
H
H
H
H
H
H
Inputs
LEAB
CLKAB
X
X
H
X
H
X
L
↑
L
L
L
↑
L
H
Ax
X
L
H
L
H
X
X
Outputs
Bx
Z
L
H
L
H
B
(2)
B
(3)
Product Pin Configuration
OEAB
LEAB
A
0
GND
A
1
A
2
VCC
A
3
A
4
A
5
GND
A
6
A
7
A
8
A
9
A
10
A
11
GND
A
12
A
13
A
14
V
CC
A
15
A
16
GND
A
17
OEBA
LEBA
1
56
2
55
3
54
4
53
5
52
6
51
7
50
8
49
9
48
10
47
11
46
12
45
13
44
56-PIN
14
V56
43
15
A56
42
16
41
17
40
18
39
19
38
20
37
21
36
22
35
23
34
24
33
25
32
26
31
27
30
28
29
GND
CLKAB
B
0
GND
B
1
B
2
VCC
B
3
B
4
B
5
GND
B
6
B
7
B
8
B
9
B
10
B
11
GND
B
12
B
13
B
14
V
CC
B
15
B
16
GND
B
17
CLKBA
GND
Notes:
1. A-to-B data flow is shown. B-to-A data flow is similar but
uses OEBA, LEBA, and CLKBA.
2. Output level before the indicated steady-state input condi-
tions were established.
3. Output level before the indicated steady-state input condi-
tions were established, provided that CLKAB was LOW
before LEAB went LOW.
4. H = High Voltage Level
L = Low Voltage Level
Z = High Impedance
↑
= LOW-to-HIGH Transition
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PI74FCT16501/162501/162H501T
18-BIT REGISTERED TRANSCEIVERS
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature .................................................................... –65°C to +150°C
Ambient Temperature with Power Applied .................................... –40°C to +85°C
Supply Voltage to Ground Potential (Inputs & Vcc Only) .............. –0.5V to +7.0V
Supply Voltage to Ground Potential (Outputs & D/O Only) ........... –0.5V to +7.0V
DC Input Voltage ............................................................................ –0.5V to +7.0V
DC Output Current ..................................................................................... 120 mA
Power Dissipation ..........................................................................................1.0W
Note:
Stresses greater than those listed under
MAXIMUM RATINGS may cause permanent
damage to the device. This is a stress rating
only and functional operation of the device at
these or any other conditions above those
indicated in the operational sections of this
specification is not implied. Exposure to
absolute maximum rating conditions for
extended periods may affect reliability.
DC Electrical Characteristics
(Over the Operating Range, T
A
= –40°C to +85°C, V
CC
= 5.0V ± 10%)
Parameters Description
V
IH
V
IL
I
IH
I
IH
I
IH
I
IH
I
IL
I
IL
I
IL
I
IL
I
BHH
I
BHL
I
OZH
(5)
I
OZL
(5)
V
IK
I
OS
I
O
V
H
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input HIGH Current
Input HIGH Current
Input HIGH Current
Input LOW Current
Input LOW Current
Input LOW Current
Input LOW Current
Bus Hold
Sustain Current
High-Impedance
Output Current
(3-S
TATE
O
UTPUTS
)
Clamp Diode Voltage
Short Circuit Current
Output Drive Current
Input Hysteresis
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
Standard Input, V
CC
= Max.
Standard I/O, V
CC
= Max.
Bus Hold Input
(4)
, V
CC
= Max.
Bus Hold I/O
(4)
, V
CC
= Max.
Standard Input, V
CC
= Min.
Standard I/O, V
CC
= Min.
Bus Hold Input
(4)
, V
CC
= Min.
Bus Hold I/O
(4)
, V
CC
= Min.
Bus Hold Input
(4)
, V
CC
= Min.
V
CC
= Max.
V
CC
= Max.
V
CC
= Min., I
IN
= –18 mA
V
CC
= Max.
(3)
, V
OUT
= GND
V
CC
= Max.
(3)
, V
OUT
= 2.5V
Min.
2.0
V
IN
= V
CC
V
IN
= V
CC
V
IN
= V
CC
V
IN
= V
CC
V
IN
= GND
V
IN
= GND
V
IN
= GND
V
IN
= GND
V
IN
= 2.0V
V
IN
= 0.8V
V
OUT
= 2.7V
V
OUT
= 0.5V
0.8
1
1
±100
±100
–1
–1
±100
±100
–50
+50
1
–1
–0.7
–140
100
–1.2
–200
–180
Typ
(2)
Max.
Units
V
V
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
V
mA
mA
m
V
–80
–50
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. Pins with Bus Hold are identified in the pin description.
5. This specification does not apply to bi-directional functionalities with Bus Hold.
3
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PI74FCT16501/162501/162H501T
18-BIT REGISTERED TRANSCEIVERS
PI74FCT16501T Output Drive Characteristics
(Over the Operating Range)
Parameters Description
V
OH
Output HIGH Voltage
Test Conditions
(1)
V
CC
= Min., V
IN
= V
IH
or V
IL
I
OH
= –3.0 mA
I
OH
= –15.0 mA
I
OH
= –32.0 mA
I
OL
= 64 mA
Min.
2.5
2.4
2.0
—
Typ
(2)
3.5
3.5
3.0
0.2
—
Max.
Units
V
V
OL
I
OFF
Output LOW Voltage
Power Down Disable
V
CC
= Min., V
IN
= V
IH
or V
IL
V
CC
= 0V, V
IN
or V
OUT
≤
4.5V
0.55
±100
V
µA
PI74FCT162501T/162H501T Output Drive Characteristics
(Over the Operating Range)
Parameters Description
V
OH
V
OL
I
ODL
I
ODH
Output HIGH Voltage
Output LOW Voltage
Output LOW Current
Output HIGH Current
Test Conditions
(1)
V
CC
= Min., V
IN
= V
IH
or V
IL
I
OH
= –24.0 mA
V
CC
= Min., V
IN
= V
IH
or V
IL
I
OL
= 24 mA
V
CC
= 5V, V
IN
= V
IH OR
V
IL
, V
OUT
= 1.5V
(3)
V
CC
= 5V, V
IN
= V
IH OR
V
IL
, V
OUT
= 1.5V
(3)
Min.
2.4
60
–60
Typ
(2)
3.3
0.3
115
–115
Max.
0.55
150
–150
Units
V
V
mA
mA
Capacitance
(T
A
= 25°C, f = 1 MHz)
Parameters
(4)
C
IN
C
OUT
Description
Input Capacitance
Output Capacitance
Test Conditions
V
IN
= 0V
V
OUT
= 0V
Typ
4.5
5.5
Max.
6
8
Units
pF
pF
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is determined by device characterization but is not production tested.
4
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PI74FCT16501/162501/162H501T
18-BIT REGISTERED TRANSCEIVERS
Power Supply Characteristics
Parameters Description
I
CC
∆I
CC
I
CCD
Quiescent Power
Supply Current
Supply Current per
Input @ TTL HIGH
Supply Current per
Input per MHz
(4)
V
CC
= Max.
V
CC
= Max.
V
CC
= Max., Outputs Open
OEAB = OEBA = V
CC
or GND
One Bit Toggling
50% Duty Cycle
V
CC
= Max.,
Outputs Open
f
CP
= 10 MH
Z
(CLKAB)
50% Duty Cycle
OEAB = OEBA = V
CC
LEAB = GND
One Bit Toggling
f
I
= 5 MH
Z
50% Duty Cycle
V
CC
= Max., Output Open
f
CP
= 10 MH
Z
(CLKAB)
50% Duty Cycle
OEAB = OEBA = V
CC
LEAB = GND
Eighteen Bits Toggling
f
I
= 2.5 MH
Z
50% Duty Cycle
Test Conditions
(1)
V
IN
= GND or V
CC
V
IN
= 3.4V
(3)
V
IN
= V
CC
V
IN
= GND
Min.
Typ
(2)
0.1
0.5
75
Max.
500
1.5
120
Units
µA
mA
µA/
MHz
I
C
Total Power Supply
Current
(6)
V
IN
= V
CC
V
IN
= GND
0.8
1.7
(5)
mA
V
IN
= 3.4V
V
IN
= GND
1.3
4.2
(5)
V
IN
= V
CC
V
IN
= GND
3.8
6.5
(5)
V
IN
= 3.4V
V
IN
= GND
8.5
20.8
(5)
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V); all other inputs at Vcc or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested.
6. I
C
=I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + f
I
N
I
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
I
= Input Frequency
N
I
= Number of Inputs at f
I
All currents are in milliamps and all frequencies are in megahertz.
5
PS2035A 03/11/96
51mcu
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