1.8V to 3.3V High-Performance
LVCMOS Clock Buffer Family
5PB11xx
Datasheet
Description
The 5PB11xx is a high-performance LVCMOS clock buffer family
of devices. It has an additive phase jitter of 50fs RMS.
There are five different fan-out variations available: 1:2 to 1:10.
The 5PB11xx supports a synchronous glitch-free output enable
(OE) function to eliminate any potential intermediate incorrect
output clock cycles when enabling or disabling outputs. It can
operate from a 1.8V to 3.3V supply.
The 5PB1104 is also available in an Automotive Grade 1,
AEC-Q100 qualified version.
Features
▪
▪
▪
▪
▪
▪
▪
▪
High-performance 1:2, 1:4, 1:6, 1:8, 1:10 LVCMOS clock buffer
Very low pin-to-pin skew: < 50ps
Very low additive jitter: < 50fs
Supply voltage: 1.8V to 3.3V
3.3V tolerant input clock
f
MAX
= 200MHz
Typical Applications
▪
Industrial applications
▪
Automotive applications
Integrated serial termination for 50Ω channel
Packaged in 8-, 14-, 16-, 20-pin TSSOP and as small as
2 × 2 mm DFN and VFQFPN packages
▪
Industrial (-40°C to +85°C) and extended (-40°C to +105°C)
temperature ranges
▪
5PB1104 available in AEC-Q100 qualified, Automotive Grade 1
(-40°C to +125°C)
Block Diagram
CLKIN
LVCMOS
LVCMOS
Y0
LVCMOS
Y1
LVCMOS
Y2
LVCMOS
Y3
LVCMOS
Yn
1G
©2020 Renesas Electronics Corporation
1
January 31, 2020
5PB11xx Datasheet
Contents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Typical Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pin Assignments – TSSOP Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin Descriptions – TSSOP Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin Assignments – DFN/VFQFPN Packages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin Descriptions – DFN/VFQFPN Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Output Logic Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
AC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Phase Noise Plots . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Test Load and Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Package Outline Drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Marking Diagrams (Industrial) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Marking Diagrams (Extended) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Marking Diagrams (Automotive). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Ordering Information (Industrial) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Ordering Information (Extended) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Ordering Information (Automotive) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
©2020 Renesas Electronics Corporation
2
January 31, 2020
5PB11xx Datasheet
Pin Assignments – TSSOP Packages
Figure 1. Pin Assignments for TSSOP Packages
CLKIN
1G
Y0
GND
1
2
3
4
8
7
6
5
Y1
NC
VDD
NC
CLKIN
1G
Y0
GND
VDD
Y4
GND
1
2
3
4
5
6
7
5PB1106PGG
5PB1102PGG
14
13
12
11
10
9
8
Y1
Y3
VDD
Y2
GND
Y5
VDD
CLKIN
1G
Y0
GND
VDD
Y4
GND
1
2
3
4
5
6
5PB1110PGG
20
19
18
17
16
15
14
13
12
11
Y1
Y3
VDD
Y2
GND
Y5
VDD
Y7
Y8
GND
CLKIN
1G
Y0
GND
1
2
3
4
5PB1104PGG
8
7
6
5
Y1
Y3
VDD
Y2
CLKIN
1G
Y0
GND
VDD
Y4
GND
Y6
1
2
3
4
5
6
7
8
5PB1108PGG
16
15
14
13
12
11
10
9
Y1
Y3
VDD
Y2
GND
Y5
VDD
Y7
7
Y6 8
VDD 9
Y9 10
Pin Descriptions – TSSOP Packages
Table 1. Pin Descriptions for TSSOP Packages
Device Number
5PB1102PGG
5PB1104PGG
5PB1106PGG
5PB1108PGG
5PB1110PGG
LVCMOS
Clock Input
CLKIN
1
1
1
1
1
Clock Output
Enable
1G
2
2
2
2
2
LVCMOS Clock Output
Y0, Y1, ... Y9
3, 8
3, 8, 5, 7
3, 14, 11, 13, 6, 9
3, 16, 13, 15, 6, 11, 8, 9
3, 20, 17, 19, 6, 15, 8, 13, 12, 10
Supply Voltage
V
DD
6
6
5, 8, 12
5, 10, 14
6
Ground
GND
4
4
4, 7, 10
4, 7, 12
4, 7, 11, 16
©2020 Renesas Electronics Corporation
3
January 31, 2020
5PB11xx Datasheet
Pin Assignments – DFN/VFQFPN Packages
Figure 2. Pin Assignments for DFN/QFN Packages
CLKIN
1G
Y0
GND
1
2
3
4
8
7
6
5
5PB1102CMG
NC
VDD
NC
16 15 14 13
Y0
GND
VDD
Y4
1
2
12
11
5PB1106CMG
10
3
9
4
5 6 7 8
GND
NC
VDD
NC
VDD
Y2
GND
Y5
Y0
GND
VDD
Y4
GND
20 19 18 17 16
1
2
3
4
5
6
7 8 9 10
5PB1110NDG
VDD
15
14
13
12
11
Y2
GND
Y5
VDD
Y7
1G
Y1
Y3
1G
Y1
CLKIN
CLKIN
Y1
CLKIN
1G
Y0
GND
1
2
3
4
5PB1104CMG
5PB1104CMT
8
7
6
5
Y1
Y3
VDD
Y2
CLKIN
1G
16 15 14 13
Y0
GND
VDD
Y4
1
2
12
11
5PB1108CMG
10
3
9
4
5 6 7 8
GND
Y7
VDD
Y6
VDD
Y2
GND
Y5
Pin Descriptions – DFN/VFQFPN Packages
Table 2. Pin Descriptions for DFN/VFQFPN Packages
Device Number
5PB1102CMG
5PB1104CMG
5PB1104CMT
5PB1106CMG
5PB1108CMG
5PB1110NDG
LVCMOS
Clock Input
CLKIN
1
1
15
15
19
Clock Output
Enable
1G
2
2
16
16
20
LVCMOS Clock Output
Y0, Y1, ... Y9
3, 8
3, 5, 7, 8
1, 4, 9, 11, 13, 14
1, 4, 6, 7, 9, 11, 13, 14
1, 4, 6, 8, 10, 11, 13, 15, 17, 18
Y1
Y3
Supply Voltage
V
DD
6
6
3, 8, 12
3, 8, 12
3, 7, 12, 16
Y6
VDD
Y9
GND
Y8
Y3
Ground
GND
4
4
2, 5, 10
2, 5, 10
2, 5, 9, 14
©2020 Renesas Electronics Corporation
4
January 31, 2020
5PB11xx Datasheet
Output Logic Table
Inputs
CLKIN
X
L
H
1G
L
H
H
Output
Yn
L
L
H
After at least three cycles of input clock toggling. Output Enable function is asynchronous to eliminate any intermediate incorrect output
clock cycles during transition which may cause frequency peaking to the downstream device.
Absolute Maximum Ratings
The absolute maximum ratings are stress ratings only. Stresses greater than those listed below can cause permanent damage to the
device. Functional operation of the 5PB11xx at absolute maximum ratings is not implied. Exposure to absolute maximum rating conditions
may affect device reliability.
Table 3. Absolute Maximum Ratings
Item
Supply Voltage, V
DD
Output Enable and All Outputs
Input Voltage, CLKIN
Ambient Operating Temperature (Industrial)
Ambient Operating Temperature (Extended)
Ambient Operating Temperature (Automotive Grade 1)
Storage Temperature
Junction Temperature
Soldering Temperature
3.8V
-0.4 V to V
DD
+ 0.5 V
-0.4 V to 3.465V
-40 to +85C
-40 to +105C
-40 to +125C
-65 to +150C
125C
260C
Rating
Recommended Operating Conditions
Table 4. Recommended Operating Conditions
Parameter
Ambient Operating Temperature (Industrial)
Ambient Operating Temperature (Extended)
Ambient Operating Temperature (Automotive Grade 1)
Power Supply Voltage (measured in respect to GND)
Minimum
-40
-40
-40
+1.71
Typical
Maximum
+85
+105
+125
+3.465
Units
C
V
©2020 Renesas Electronics Corporation
5
January 31, 2020
Domestic Chip Exchange
京公网安备 11010802033920号
EEWORLD
