VS-720 Voltage Controlled SAW Oscillator
VS-720
Voltage Controlled SAW Oscillator
Features
•
Industry Standard Package, 5.0 x 7.5 x 2.0 mm
•
ASIC Technology For Ultra Low Jitter
0.100 ps-rms typical across 12 kHz to 20 MHz BW
0.120 ps-rms typical across 50 kHz to 80 MHz BW
•
Output Frequencies from 150 MHz to 800 MHz
•
Absolute Pull Range (APR) up to ± 100 ppm
•
3.3 V Operation
•
LV-PECL or LVDS Configuration with Fast Transition Times
•
Complementary Outputs
•
Output Disable Feature
•
Improved Temperature Stability over Standard VCSO
Product is free of lead and compliant to
EC RoHS Directive
Applications
PLL circuits for Clock Smoothing and Frequency Translation
Description
•
1-2-4 Gigabit Fibre Channel
•
10 Gigabit Fibre Channel
•
10GbE LAN / WAN
•
OC-192
•
SONET / SDH
Standard
INCITS 352-2002
INCITS 364-2003
IEEE 802.3ae
ITU-T G.709
GR-253-CORE Issue3
Description
The VS-720 is a Voltage Controlled SAW Oscillator that
achieves low phase noise and very low jitter performance.
The VS-720 is housed in an industry standard 6-Pad leadless
ceramic package that is hermetically sealed. Packaging
options include bulk or tape and reel
Vectron International, 267 Lowell Rd, Hudson NH 03051-4916
Page 1 of 7
Tel: 1-88-VECTRON-1
Website: www.vectron.com
Rev: 3 April 2007
VS-720 Voltage Controlled SAW Oscillator
Electrical Performance
Parameter
Frequency
Nominal Frequency
Absolute Pull Range
Linearity
Gain Transfer (See Pg 5)
Temperature Stability
Supply
Voltage
Current (No Load)
Outputs
Mid Level - LVPECL
Swing – LVPECL
Mid Level - LVDS
Swing – LVDS
Current
Rise Time
Fall Time
Symmetry
Jitter (12 kHz – 20 MHz BW) 622.08 MHz
Jitter (50 kHz – 80 MHz BW) 622.08 MHz
Period Jitter, RMS (622.08 MHz)
Period Jitter, Peak - Peak (622.08 MHz)
Harmonic Suppression
Control Voltage
Control Voltage Range for APR
Control Voltage Input Impedance
Control Voltage Modulation BW
Operating Temp. (Ordering Option)
Package Size
1.
2.
3.
4.
5.
6.
7.
8.
9.
Symbol
f
N
APR
Lin
K
V
f
STAB
V
CC
I
CC
Minimum
150
±50
Typical
Maximum
800
±10
Units
MHz
ppm
%
ppm/V
ppm
V
mA
V
mV-pp
V
mV-pp
mA
ps
ps
%
ps-rms
ps-rms
ps-rms
ps pk-pk
dBc
V
KΩ
KHz
°C
mm
Notes
1,2,3
1,2,8
2,4,8
2,8
1
2,3
3
2,3
2,3
2,3
2,3
6
5,6
5,6
2,3
6,7
6,7
9
9
6
2,8
6
6
1,3
+100
±20
2.97
3.3
55
Vcc-1.25
600
Vcc-2.3
350
250
250
50
0.100
0.120
3.0
20
60
3.63
70
Vcc-1.0
750
V
CC
-2.5
450
20
500
500
55
0.250
0.300
4.0
30
Vcc-1.4
450
V
CC
-2.4
250
I
OUT
t
R
t
F
SYM
φJ
φJ
φJ
φJ
45
50
V
C
Z
IN
BW
T
OP
0.3
75
50
3.0
0/70,-20/70 or -40/85
5.0 x 7.5 x 2.0
See Standard Frequencies and Ordering Information tables (Pg 7) for more specific information
Parameters are tested with production test circuit below (Fig 1).
Parameters are tested at ambient temperature with test limits guard-banded for specified operating temperature.
Measured as the maximum deviation from the best straight-line fit, per MIL-0-55310.
Measured from 20% to 80% of a full output swing (Fig 2).
Not tested in production, guaranteed by design, verified at qualification.
Integrated across stated bandwidth per GR-253-CORE Issue3.
Tested with Vc = 0.3V to 3.0V unless otherwise stated in part description
Broadband Period Jitter measured using Lecroy Wavemaster 8600A 6 GHz Oscilloscope, 250K samples taken
(-1.3V to +2.0V)
Enable, Disable
(-1.3V, +2.0V)
1
6
(+2.0V)
t
R
80%
t
F
SYM = 100 x t
A
/ t
B
Vcc - 1.0V
2
5
COutput
(-1.3V)
3
4
50
Ω
Output
Vcc - 1.3V
20%
Vcc - 1.6V
50
Ω
Test Circuit Notes:
1) To Permit 50
Ω
Measurement of Outputs, all DC Inputs are Biased Down 1.3V.
2) All Voltage Sources Contain Bypass Capacitors to Minimize Supply Noise.
3) 50
Ω
Terminations are Within Test Equipment.
t
A
t
B
Figure 1. Test Circuit
Vectron International, 267 Lowell Rd, Hudson NH 03051-4916
Page 2 of 7
Figure 2. 10K LV-PECL Waveform
Tel: 1-88-VECTRON-1
Website: www.vectron.com
Rev: 3 April 2007
VS-720 Voltage Controlled SAW Oscillator
Outline Diagram
Suggested Pad Layout
1.96
[0.077]
3.66
[0.144]
1.78
[0.070]
2.54
[0.100]
5.08
[0.200]
mm
[inch]
Standard Pin Out
Pin
1
2
3
4
5
6
Symbol
V
C
OE
1
GND
Output
COutput
V
CC
Function
VCXO
Enable = LV-CMOS logic 0 or Ground,
Disable = LV-CMOS logic 1
Case and Electrical Ground
Output
Complementary Output
Power Supply Voltage (3.3V ±10%)
Note 1: For proper operation disable pin can not be left floating
. See page 7 for alternative input logic option
Tape and Reel (EIA-481-2-A)
Po
F
W
ØDo
W2
C
N
A
D
P1
W1
B
Tape Dimensions (mm)
Dimension
Tolerance
VS-720
Reel Dimensions (mm)
F
Do
Typ
1.5
W
Typ
16
Po
Typ
4
P1
Typ
8
A
Typ
178
B
Min
1.5
C
Typ
13
D
Min
20.2
N
Min
50
W1
Typ
16.4
W2
Max
22.4
Typ
7.5
# Per
Reel
200
Page 3 of 7
Vectron International 267 Lowell Rd, Hudson NH 03051-4916
Tel: 1-88-VECTRON-1
Website: www.vectron.com
Rev: 3 April 2007
VS-720 Voltage Controlled SAW Oscillator
Absolute Maximum Ratings
Parameter
Power Supply
Output Current
Voltage Control Range
Storage Temperature
Soldering Temp/Time
Symbol
V
CC
Iout
V
C
TS
T
LS
Ratings
0 to 4
25
0 to V
CC
-55 to 125
260/40
Unit
V
mA
V
°C
°C/sec
Stresses in excess of the absolute maximum ratings can permanently damage the device. Functional operation
is not implied at these or any other conditions in excess of conditions represented in the operational sections of
this datasheet. Exposure to absolute maximum ratings for extended periods may adversely affect device
reliability. Permanent damage is also possible if OD or Vc is applied before Vcc.
Suggested Output Load Configurations
+3.3V
0.10
µ
F
0.01
µ
F
0.10
µ
F
0.01
µ
F
150
Ω
150
Ω
+3.3V
+3.3V
Vc
OD
Gnd
1
2
3
6
5
4
Vcc
COutput
Output
Z = 50
Ω
Z = 50
Ω
100
Ω
Vc
OD
Gnd
1
2
3
6
5
4
Vcc
COutput
Output
Z = 50
Ω
Z = 50
Ω
40
Ω
40
Ω
49
Ω
49
Ω
240
Ω
240
Ω
LV-PECL to LV-PECL:
For short transmission lengths, the power
consumption could be reduced by removing the 100
Ω
resistor and
doubling the value of the pull down resistors.
LV-PECL to LVDS:
Restricted for short transmission lengths.
Configuration may require modification depending on LVDS receiver.
0.10
µ
F
0.01
µ
F
+3.3V
0.10
µ
F
0.01
µ
F
+2.0V
Vc
OD
Gnd
1
2
3
6
5
4
Vcc
COutput
Output
0.01
µ
F
0.01
µ
F
Vc
OD
-1.3V
1
2
3
6
5
4
Vcc
COutput
Output
240
Ω
240
Ω
Functional Test:
Allows standard power supply configuration.
Since AC coupled, the LV-PECL levels cannot be measured.
Production Test:
Allows direct DC coupling into 50
Ω
measurement
equipment. Must bias the power supplys as shown. Similar to Figure 1.
Page 4 of 7
Vectron International 267 Lowell Rd Hudson NH 03051-4916
Tel: 1-88-VECTRON-1
Website: www.vectron.com
Rev: 3 April 2007
VS-720 Voltage Controlled SAW Oscillator
Typical Gain Transfer
150
100
50
P ll (p m
u
p )
0
-50
VS-720 pull, 622 MHz
Linear (VS-720 pull, 622 MHz)
-100
-150
0.00
0.50
1.00
1.50
2.00
2.50
3.00
Control Voltage (volts)
Typical Phase Noise
0
VS-720-LFF-GAB- 622.0800 MHz
-10
-20
-30
-40
Phase Noise Level (dBc/Hz)
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
10
100
1000
10000
100000
1000000
10000000
100000000
Frequency Offset (Hz)
Page 5 of 7
Vectron International
267 Lowell Rd Hudson NH 03051-4916
Tel: 1-88-VECTRON-1
Website: www.vectron.com
Rev: 3 April 2007
Jitter OC48 (12kHz to 20MHz)
0.08 ps-rms or 0.56 ps-pp
Jitter OC192 (50kHz to 80MHz)
0.11 ps-rms or 0.80 pp-rms
Phase Noise at Specific Frequency
Offsets
10Hz -46 dBc/Hz
100Hz -80 dBc/Hz
1000Hz -110 dBc/Hz
10kHz -130 dBc/Hz
100kHz -134 dBc/Hz
1MHz -138 dBc/Hz
10MHz -147 dBc/Hz
20MHz -147 dBc/Hz
40MHz -148 dBc/Hz
FPGA/CPLD
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