MPC8347CVRADF datasheet, PDF - EEWORLD Datasheet

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MPC8347CVRADF: Description32-BIT, 266MHz, RISC PROCESSOR, PBGA620, 29 X 29 MM, 2.46 MM HEIGHT, 1 MM PITCH, LEAD FREE, PLASTIC, BGA-620; CategoryThe embedded processor and controller Microcontrollers and processors; File Size1MB，102 Pages; ManufacturerNXP; Websitehttps://www.nxp.com

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MPC8347CVRADF Overview

32-BIT, 266MHz, RISC PROCESSOR, PBGA620, 29 X 29 MM, 2.46 MM HEIGHT, 1 MM PITCH, LEAD FREE, PLASTIC, BGA-620

MPC8347CVRADF Parametric

Parameter Name	Attribute value
Maker	NXP
Parts packaging code	BGA
package instruction	BGA,
Contacts	620
Reach Compliance Code	unknown
ECCN code	3A001.A.3
Address bus width	32
bit size	32
boundary scan	YES
maximum clock frequency	66 MHz
External data bus width	32
Format	FLOATING POINT
Integrated cache	YES
JESD-30 code	S-PBGA-B620
JESD-609 code	e1
length	29 mm
low power mode	YES
Number of terminals	620
Package body material	PLASTIC/EPOXY
encapsulated code	BGA
Package shape	SQUARE
Package form	GRID ARRAY
Certification status	Not Qualified
Maximum seat height	2.46 mm
speed	266 MHz
Maximum supply voltage	1.26 V
Minimum supply voltage	1.14 V
Nominal supply voltage	1.2 V
surface mount	YES
technology	CMOS
Terminal surface	TIN SILVER COPPER
Terminal form	BALL
Terminal pitch	1 mm
Terminal location	BOTTOM
width	29 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR, RISC

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Freescale Semiconductor

Technical Data

Document Number: MPC8347EEC

Rev. 11, 02/2009

MPC8347E PowerQUICC™ II Pro

Integrated Host Processor Hardware

Specifications

The MPC8347E PowerQUICC™ II Pro is a next generation

PowerQUICC II integrated host processor. The MPC8347E

contains a PowerPC™ processor core built on Power

Architecture™ technology with system logic for

networking, storage, and general-purpose embedded

applications. For functional characteristics of the processor,

refer to the

MPC8349E PowerQUICC™ II Pro Integrated

Host Processor Family Reference Manual.

To locate published errata or updates for this document, refer

to the MPC8347E product summary page on our website

listed on the back cover of this document or, contact your

local Freescale sales office.

NOTE

The information in this document is accurate for

revision 1.1 silicon and earlier. For information on

revision 3.0 silicon and later versions (for orderable

part numbers ending in A or B), see the

MPC8347EA PowerQUICC™ II Pro Integrated

Host Processor Hardware Specifications.

See

Section 23.1, “Part Numbers Fully Addressed

by This Document,”

for silicon revision level

determination.

Contents

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . 7

Power Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 10

Clock Input Timing . . . . . . . . . . . . . . . . . . . . . . . . . . 12

RESET Initialization . . . . . . . . . . . . . . . . . . . . . . . . . 13

DDR SDRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

DUART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Ethernet: Three-Speed Ethernet, MII Management . 22

USB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Local Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

JTAG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

PCI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

GPIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

IPIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Package and Pin Listings . . . . . . . . . . . . . . . . . . . . . 55

Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

Thermal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84

System Design Information . . . . . . . . . . . . . . . . . . . 91

Document Revision History . . . . . . . . . . . . . . . . . . . 95

Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . 98

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