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NTMS4P01R2G

Description
3400mA, 12V, P-CHANNEL, Si, SMALL SIGNAL, MOSFET, CASE 751-07, SO-8
CategoryDiscrete semiconductor    The transistor   
File Size78KB,8 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Environmental Compliance
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NTMS4P01R2G Overview

3400mA, 12V, P-CHANNEL, Si, SMALL SIGNAL, MOSFET, CASE 751-07, SO-8

NTMS4P01R2G Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerON Semiconductor
Parts packaging codeSOT
package instructionCASE 751-07, SO-8
Contacts8
Manufacturer packaging codeCASE 751-07
Reach Compliance Codecompliant
ECCN codeEAR99
ConfigurationSINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage12 V
Maximum drain current (ID)3.4 A
Maximum drain-source on-resistance0.045 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
Maximum feedback capacitance (Crss)400 pF
JESD-30 codeR-PDSO-G8
Humidity sensitivity level1
Number of components1
Number of terminals8
Operating modeENHANCEMENT MODE
Maximum operating temperature150 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typeP-CHANNEL
Certification statusNot Qualified
surface mountYES
Terminal formGULL WING
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
transistor applicationsSWITCHING
Transistor component materialsSILICON

NTMS4P01R2G Preview

NTMS4P01R2
Power MOSFET
−4.5 Amps, −12 Volts
P-Channel Enhancement-Mode
Single SO-8 Package
Features
High Density Power MOSFET with Ultra Low R
DS(on)
Providing Higher Efficiency
Miniature SO- 8 Surface Mount Package - Saves Board Space
Diode Exhibits High Speed with Soft Recovery
I
DSS
Specified at Elevated Temperature
Drain- to- Source Avalanche Energy Specified
Mounting Information for the SO- 8 Package is Provided
V
DSS
-12 V
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R
DS(ON)
TYP
30 mΩ @ -4.5 V
I
D
MAX
-4.5 A
Applications
Power Management in Portable and Battery-Powered Products, i.e.:
Computers, Printers, PCMCIA Cards, Cellular & Cordless Telephones
MAXIMUM RATINGS
Please See the Table on the Following Page
G
Single P-Channel
D
S
8
1
SO-8
CASE 751
STYLE 13
MARKING DIAGRAM
& PIN ASSIGNMENT
N.C.
Source
Source
Gate
1
2
3
4
Top View
E4P01
L
Y
WW
= Device Code
= Assembly Location
= Year
= Work Week
E4P01
LYWW
8
7
6
5
Drain
Drain
Drain
Drain
ORDERING INFORMATION
Device
NTMS4P01R2
Package
SO-8
Shipping
2500/Tape & Reel
©
Semiconductor Components Industries, LLC, 2003
1
June, 2003 - Rev. 1
Publication Order Number:
NTMS4P01R2/D
NTMS4P01R2
MAXIMUM RATINGS
(T
J
= 25°C unless otherwise noted)
Rating
Drain-to-Source Voltage
Drain-to-Gate Voltage (R
GS
= 1.0 mW)
Gate-to-Source Voltage - Continuous
Thermal Resistance -
Junction-to-Ambient (Note 1)
Total Power Dissipation @ T
A
= 25°C
Continuous Drain Current @ 25°C
Continuous Drain Current @ 70°C
Maximum Operating Power Dissipation
Maximum Operating Drain Current
Pulsed Drain Current (Note 4)
Thermal Resistance -
Junction-to-Ambient (Note 2)
Total Power Dissipation @ T
A
= 25°C
Continuous Drain Current @ 25°C
Continuous Drain Current @ 70°C
Maximum Operating Power Dissipation
Maximum Operating Drain Current
Pulsed Drain Current (Note 4)
Thermal Resistance -
Junction-to-Ambient (Note 3)
Total Power Dissipation @ T
A
= 25°C
Continuous Drain Current @ 25°C
Continuous Drain Current @ 70°C
Maximum Operating Power Dissipation
Maximum Operating Drain Current
Pulsed Drain Current (Note 4)
Operating and Storage Temperature Range
Single Pulse Drain-to-Source Avalanche Energy - Starting T
J
= 25°C
(V
DD
= -12 Vdc, V
GS
= -5.0 Vdc, Peak I
L
= -8.0 Apk, L = 10 mH, R
G
= 25
Ω)
Symbol
V
DSS
V
DGR
V
GS
R
θJA
P
D
I
D
I
D
P
D
I
D
I
DM
R
θJA
P
D
I
D
I
D
P
D
I
D
I
DM
R
θJA
P
D
I
D
I
D
P
D
I
D
I
DM
T
J
, T
stg
E
AS
Value
-12
-12
±10
50
2.5
-6.04
-4.82
1.2
-4.18
-20
85
1.47
-4.50
-3.65
0.7
-3.20
-15
159
0.79
-3.40
-2.72
0.38
-2.32
-12
- 55 to +150
320
260
Unit
V
V
V
°C/W
W
A
A
W
A
A
°C/W
W
A
A
W
A
A
°C/W
W
A
A
W
A
A
°C
mJ
°C
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds
T
L
1. Mounted onto a 2″ square FR-4 Board (1″ sq. 2 oz Cu 0.06″ thick single sided), t
10 seconds.
2. Mounted onto a 2″ square FR-4 Board (1″ sq. 2 oz Cu 0.06″ thick single sided), t = steady state.
3. Minimum FR-4 or G-10 PCB, t = Steady State.
4. Pulse Test: Pulse Width = 300
ms,
Duty Cycle = 2%.
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2
NTMS4P01R2
ELECTRICAL CHARACTERISTICS
(T
C
= 25°C unless otherwise noted) (Note 5)
Characteristic
OFF CHARACTERISTICS
Drain-to-Source Breakdown Voltage
(V
GS
= 0 Vdc, I
D
= -250
µAdc)
Temperature Coefficient (Positive)
Zero Gate Voltage Drain Current
(V
DS
= -12 Vdc, V
GS
= 0 Vdc, T
J
= 25°C)
(V
DS
= -12 Vdc, V
GS
= 0 Vdc, T
J
= 125°C)
Gate-Body Leakage Current
(V
GS
= -10 Vdc, V
DS
= 0 Vdc)
Gate-Body Leakage Current
(V
GS
= +10 Vdc, V
DS
= 0 Vdc)
ON CHARACTERISTICS
Gate Threshold Voltage
(V
DS
= V
GS
, I
D
= -250
µAdc)
Temperature Coefficient (Negative)
Static Drain-to-Source On-State Resistance
(V
GS
= -4.5 Vdc, I
D
= -4.5 Adc)
(V
GS
= -2.7 Vdc, I
D
= -2.25 Adc)
(V
GS
= -2.5 Vdc, I
D
= -2.25 Adc)
Forward Transconductance (V
DS
= -2.5 Vdc, I
D
= -2.25 Adc)
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS
(Notes 6 & 7)
Turn-On Delay Time
Rise Time
Turn-Of f Delay Time
Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
BODY-DRAIN DIODE RATINGS
(Note 6)
Diode Forward On-Voltage
Reverse Recovery Time
(I
S
= -4.5 Ad V
GS
= 0 Vdc,
4 5 Adc,
Vd
dI
S
/dt = 100 A/µs)
Reverse Recovery Stored Charge
5. Handling precautions to protect against electrostatic discharge is mandatory.
6. Indicates Pulse Test: Pulse Width = 300
µs
max, Duty Cycle = 2%.
7. Switching characteristics are independent of operating junction temperature.
(I
S
= -4.5 Adc, V
GS
= 0 V)
(I
S
= -4.5 Adc, V
GS
= 0 Vdc, T
J
= 125°C)
V
SD
t
rr
t
a
t
b
Q
RR
-
-
-
-
-
-
-0.9
-0.7
38
20
18
0.03
-1.25
-
-
-
-
-
µC
Vdc
ns
(V
DS
= -9.6 Vdc,
V
GS
= -4.5 Vdc,
I
D
= -4.5 Ad )
4 5 Adc)
(V
DD
= -12 Vdc, I
D
= -4.5 Adc,
V
GS
= -4.5 Vdc,
-4 5 Vdc
R
G
= 6.0
Ω)
t
d(on)
t
r
t
d(off)
t
f
Q
tot
Q
gs
Q
gd
-
-
-
-
-
-
-
20
60
65
75
20
4.0
7.0
35
100
100
125
35
-
-
nC
ns
(V
DS
= -9.6 Vd V
GS
= 0 Vdc,
9 6 Vdc,
Vd
f = 1.0 MHz)
C
iss
C
oss
C
rss
-
-
-
1435
635
210
1850
1000
400
pF
V
GS(th)
-0.65
-
R
DS(on)
-
-
-
g
FS
-
0.030
0.040
0.045
10
0.045
0.055
-
-
Mhos
-0.9
2.9
-1.15
-
Vdc
mV/°C
V
(BR)DSS
-12
-
I
DSS
-
-
I
GSS
-
I
GSS
-
-
100
-
-100
nAdc
-
-
-1.0
-10
nAdc
-
-15
-
-
Vdc
mV/°C
µAdc
Symbol
Min
Typ
Max
Unit
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3
NTMS4P01R2
8 -8 V
-I
D
, DRAIN CURRENT (AMPS)
7
6
5
4
3
-1.7 V
2
1
0
V
GS
= -1.3 V
0
0.25
0.5
0.75
1
1.25
1.5 1.75
-V
DS
, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
2
-2.3 V
-4.5
-3.7
-3.1
-2.7
-2.1 V
V
V
V
V
T
J
= 25°C
V
DS
-10 V
-1.9 V
-I
D
, DRAIN CURRENT (AMPS)
8
6
-2.5 V
4
100°C
2
25°C
T
J
= -55°C
0
0.5
1
1.5
2
-V
GS
, GATE-T O-SOURCE VOLTAGE (VOLTS)
2.5
Figure 1. On-Region Characteristics
R
DS(on)
, DRAIN-TO-SOURCE RESISTANCE (W)
R
DS(on)
, DRAIN-TO-SOURCE RESISTANCE (W)
Figure 2. Transfer Characteristics
0.12
I
D
= -4.5 A
T
J
= 25°C
0.09
0.05
T
J
= 25°C
0.04
V
GS
= -2.5 V
V
GS
= -2.7 V
0.03
V
GS
= -4.5 V
0.02
0.06
0.03
0
0
2
4
6
-V
GS
, GATE-T O-SOURCE VOLTAGE (VOLTS)
8
0.01
2
4
6
-I
D
, DRAIN CURRENT (AMPS)
8
R
DS(on)
, DRAIN-TO-SOURCE RESISTANCE (NORMALIZED)
Figure 3. On-Resistance versus
Gate-T o-Source Voltage
1.6
I
D
= -4.5 A
V
GS
= -4.5 V
10,000
Figure 4. On-Resistance versus Drain Current
and Gate Voltage
V
GS
= 0 V
1.4
-I
DSS
, LEAKAGE (nA)
T
J
= 150°C
1.2
1000
T
J
= 125°C
1
0.8
0.6
-50
100
-25
0
25
50
75
100
125
T
J
, JUNCTION TEMPERATURE (°C)
150
2
4
8
6
10
-V
DS
, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
12
Figure 5. On-Resistance Variation with
Temperature
Figure 6. Drain-To-Source Leakage Current
versus Voltage
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4
NTMS4P01R2
-V GS , GATE-T O-SOURCE VOLTAGE (VOLTS)
-V DS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
V
DS
= 0 V
C
iss
C, CAPACITANCE (pF)
3000
C
rss
2000
C
iss
1000
C
rss
0
10
8
6
4
2
2
0
-V
GS
-V
DS
4
6
8
10
12
C
oss
V
GS
= 0 V
T
J
= 25°C
5
QT
4
-V
DS
3
Q1
Q2
-V
GS
6
8
10
4000
2
I
D
= -4.5 A
T
J
= 25°C
4
1
0
0
4
8
12
16
2
0
20
24
Q
g
, TOTAL GATE CHARGE (nC)
GATE-T O-SOURCE OR
DRAIN-T O-SOURCE VOLTAGE (VOLTS)
Figure 8. Gate-To-Source and Drain-To-Source
Voltage versus Total Charge
4
Figure 7. Capacitance Variation
1000
V
DD
= -12 V
I
D
= -4.5 A
V
GS
= -4.5 V
t, TIME (ns)
-I
S
, SOURCE CURRENT (AMPS)
V
GS
= 0 V
T
J
= 25°C
3
t
d(off)
t
f
t
r
100
2
t
d(on)
1
10
1
10
R
G
, GATE RESISTANCE (OHMS)
100
0
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
-V
SD
, SOURCE-TO-DRAIN VOLTAGE (VOLTS)
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
Figure 10. Diode Forward Voltage versus Current
DRAIN-T O-SOURCE DIODE CHARACTERISTICS
100
ID , DRAIN CURRENT (AMPS)
V
GS
= 10 V
SINGLE PULSE
T
C
= 25°C
10
1.0 ms
10 ms
di/dt
1
R
DS(on)
LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.1
Mounted on 2″ sq. FR4 board
(1″ sq. 2 oz. Cu 0.06″ thick
single sided), 10s max.
0.1
1
10
100
dc
I
S
t
rr
t
a
t
b
TIME
t
p
I
S
0.25 I
S
0.01
V
DS
, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Diode Reverse Recovery Waveform
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